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PDF LTC1406 Data sheet ( Hoja de datos )
| Número de pieza | LTC1406 | |
| Descripción | Low Power/ 8-Bit/ 20Msps/ Sampling A/D Converter | |
| Fabricantes | Linear Technology | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de LTC1406 (archivo pdf) en la parte inferior de esta página. Total 16 Páginas | ||
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FEATURES
s Low Power, 8-Bit, 20Msps ADC
s 250MHz Internal Sample-and-Hold
s 7 Effective Bits at 70MHz Input Frequency
s ±1LSB DNL and INL Max
s Single 5V Supply and 150mW Dissipation
s Power Down to 1µA
s True Differential Inputs Reject Common Mode Noise
s Accepts Single-Ended or Differential Input Signals
s ±1V Differential or 2V Single-Ended Input Span
s Analog Inputs Common Mode to VDD and GND
s 24-Pin Narrow SSOP Package
U
APPLICATIONS
s Telecommunications
s Wireless Communications
s Digital Cellular Telephones
s CCDs and Image Scanners
s Video Digitizing and Digital Television
s Digital Color Copiers
s High Speed Undersampling
s Personal Computer Video
s High Speed Data Acquisition
LTC1406
Low Power, 8-Bit, 20Msps,
Sampling A/D Converter
DESCRIPTION
The LTC ®1406 is a 20Msps, 8-bit, sampling A/D converter
which draws only 150mW from a single 5V supply. This
easy-to-use device includes a high dynamic range sample-
and-hold with a 250MHz bandwidth.
The LTC1406’s full-scale input range is ±1V. The inputs
can be driven differentially or one input can be tied to a
fixed voltage and the other input driven with a ±1V bipolar
input. Maximum DC specifications include ±1LSB DNL
and INL over temperature. Outstanding AC performance
includes 48.5dB S/(N + D) and 62dB THD with a 1MHz
input; 47.5dB S/(N + D) and 59dB THD at the Nyquist input
frequency of 10MHz.
The unique differential input sample-and-hold can acquire
single-ended or differential input signals up to its 250MHz
bandwidth. The 60dB common mode rejection allows
users to eliminate ground loops and common mode noise
by measuring signals differentially from the source.
The ADC has an 8-bit parallel output port with separate
power supply and ground allowing easy interface to 3V
digital systems. The pipelined architecture has five clock
cycles of data latency.
, LTC and LT are registered trademarks of Linear Technology Corporation.
TYPICAL APPLICATION
Low Power, 20MHz, 8-Bit Sampling ADC
DVDD
12
DGND
11
24
CLK
CLOCK
CIRCUITRY
OVDD
2
AIN+ 7
AIN– 8
TRACK-AND-
HOLD AMP
2.2V
2.5k 1.95k
8-BIT
PIPELINE
ADC
DIGITAL
DATA
OUTPUT
DRIVERS
9
AVDD
4
VBIAS
10 3
AGND SHDN
56
VREF AGND
1
OGND
23
OF/UF
22
D7
21 D6
20 D5
19 D4
18 D3
17
D2
16
D1
15
D0
1406 BD
Effective Bits and Signal-to-Noise + Distortion
vs Input Frequency
8
7
6
5
4
3
2
1
0
100k
50
44
38
32
1M 10M
INPUT FREQUENCY (Hz)
100M
1406 TA02
1
1 page  
LTC1406
TYPICAL PERFORMANCE CHARACTERISTICS
Spurious-Free Dynamic Range
vs Input Frequency
70
60
50
40
30
20
10
0
100k
1M 10M
INPUT FREQUENCY (Hz)
100M
1406 G04
Integral Nonlinearity
vs Output Code
1.0
0.5
0
–0.5
–1.0
0
32 64 96 128 160 192 224 256
OUTPUT CODE
1406 G07
Intermodulation Distortion Plot
0
–10
fSAMPLE = 20MHz
fIN1 = 3.500977MHz
–20 fIN2 = 3.598633MHz
–30
–40
–50
–60
–70
–80
–90
–100
0 1 2 3 4 5 6 7 8 9 10
FREQUENCY (MHz)
1406 G05
Input Common Mode Rejection
vs Input Frequency
70
60
50
40
30
20
10
0
100k
1M 10M
INPUT FREQUENCY (Hz)
100M
1406 G08
Differential Nonlinearity
vs Output Code
1.0
0.5
0
–0.5
–1.0
0
32 64 96 128 160 192 224 256
OUTPUT CODE
1406 G06
Supply Current vs
Sampling Frequency
35
30
25
20
15
10
5
0
100k
1M 10M 20M
SAMPLING FREQUENCY (Hz)
1406 G09
PIN FUNCTIONS
OGND (Pin 1): Digital Data Output Ground. Tie to analog
ground plane. May be tied to logic ground if desired.
OVDD (Pin 2): Digital Data Output Supply. Normally tied to
5V, can be used to interface with 3V digital logic. Bypass
to OGND with 10µF tantalum in parallel with 0.1µF or 10µF
ceramic.
SHDN (Pin 3): Power Shutdown Input. Logic low selects
shutdown.
VBIAS (Pin 4): Internal Bias Voltage. Internally set to 2.2V.
Bypass to analog ground plane with 10µF tantalum in par-
allel with 0.1µF or 10µF ceramic.
VREF (Pin 5): External 2.5V Reference Input. Bypass to
analog ground plane with 10µF tantalum in parallel with
0.1µF or 10µF ceramic.
AGND (Pin 6): Analog Ground. Tie to analog ground plane.
AIN+ (Pin 7): ±1V Input. The maximum output code
occurs when [(AIN+) – (AIN–)] = 1V. The minimum output
code occurs when [(AIN+) – (AIN–)] = – 1V.
AIN– (Pin 8): ±1V Input. The maximum output code
occurs when [(AIN+) – (AIN–)] = 1V. The minimum output
code occurs when [(AIN+) – (AIN–)] = – 1V. For single-
ended operation, tie AIN– to a DC voltage (e.g., VREF).
5
5 Page 
LTC1406
APPLICATIONS INFORMATION
LT1229/LT1230: Dual and Quad 100MHz Current Feed-
back Amplifiers. ±2V to ±15V supplies. Low noise. 6mA
supply current each amplifier.
LT1259/LT1260: Dual and Triple 130MHz Current Feed-
back Amplifiers. ±2V to ±14V supplies. 5mA supply cur-
rent. Low distortion. Low noise.
LT1363: 70MHz Voltage Feedback Amplifier. ±2.5V to
±15V supplies. 7.5mA supply current. Low distortion.
LT1364/LT1365: Dual and Quad 70MHz Voltage Feedback
Amplifiers. ±2.5V to ±15V supplies. 7.5mA supply current
per amplifier. Low distortion.
Input Filtering
The noise and the distortion of the input amplifier and
other circuitry must be considered since they will add to
the LTC1406 noise and distortion. The small-signal band-
width of the sample-and-hold circuit is 250MHz. Any noise
or distortion products that are present at the analog inputs
will be summed over this entire bandwidth. Noisy input
circuitry should be filtered prior to the analog inputs to
minimize noise. A simple 1-pole RC filter is sufficient for
many applications. For example, Figure 9 shows a 220pF
capacitor from AIN+ to AIN– and a 75Ω source resistor to
limit the input bandwidth to 9.6MHz. The 220pF capacitor
also acts as a charge reservoir for the input sample-and-
hold and isolates the ADC input from sampling glitch sen-
sitive circuitry. Larger value capacitors may be substituted
to further limit the input bandwidth. High quality capaci-
tors and resistors should be used since these components
can add distortion. NPO and silver mica type dielectric
capacitors have excellent linearity. Carbon surface mount
ANALOG INPUT
1.5V TO 3.5V
75Ω
220pF
2.5V
AIN+
LTC1406
AIN–
VREF
1406 F09
resistors can also generate distortion from self-heating
and from damage that may occur during soldering. Metal
film surface mount resistors are much less susceptible to
both problems.
Input/Output Characteristics
Figure 10 shows the ideal input/output characteristics for
the LTC1406. The code transitions occur midway between
successive integer LSB values (i.e., – FS + 0.5LSB, – FS +
1.5LSB, – FS + 2.5LSB...FS – 1.5LSB, FS – 0.5LSB). The
output is straight binary with 1LSB = FS – (– FS)/256 = 2V/
256 = 7.8125mV. The OF/UF bit indicates that the input has
exceeded full scale and can be used to detect an overrange
or underrange condition. A logic high output on the OF/UF
pin with an output code of 0000 0000 indicates the input
is less than the negative full scale. A logic high output on
the OF/UF pin with an output code of 1111 1111 indicates
that the input is greater than the positive full scale. A logic
low output on the OF/UF pin indicates the input is within
the full-scale range of the converter.
In applications where absolute accuracy is important, off-
set and full-scale errors can be adjusted to zero. Offset
error must be adjusted before full-scale error. Zero offset
is achieved by adjusting the offset applied to the AIN– input.
For zero offset error, apply a voltage equal to the input
OF/UF BIT
1111 1111
1111 1110
1111 1101
1000 0001
1000 0000
0111 1111
0111 1110
0000 0010
0000 0001
0000 0000
– FS
–1 0 1
LSB LSB
INPUT VOLTAGE (V)
FS – 1LSB
1406 F10
Figure 9. RC Input Filter
Figure 10. Transfer Characteristics
11
11 Page | ||
| Páginas | Total 16 Páginas | |
| PDF Descargar | [ Datasheet LTC1406.PDF ] | |
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