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PDF LTC1402IGN Data sheet ( Hoja de datos )
| Número de pieza | LTC1402IGN | |
| Descripción | Serial 12-Bit/ 2.2Msps Sampling ADC with Shutdown | |
| Fabricantes | Linear Technology | |
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Final Electrical Specifications
LTC1402
Serial 12-Bit, 2.2Msps
Sampling ADC with Shutdown
FEATURES
DESCRIPTION
October 1999
s Sample Rate: 2.2Msps
s 72dB S/(N + D) and –89dB THD at Nyquist
s No Missing Codes over Temperature
s Available in 16-Pin Narrow SSOP Package
s Single Supply 5V or ±5V Operation
s Power Dissipation: 90mW (Typ)
s Nap Mode with Instant Wake-Up: 15mW
s Sleep Mode: 10µW
s True Differential Inputs Reject Common Mode Noise
s 80MHz Full Power Bandwidth Sampling
s Input Range (1mV/LSB): 0V to 4.096V or ±2.048V
s Internal Reference Can Be Overdriven Externally
s 3-Wire Interface to DSPs and Processors (SPI and
MICROWIRETM Compatible)
U
APPLICATIONS
s Telecommunications
s High Speed Data and Signal Acquisition
s Digitally Multiplexed Data Acquisition Systems
s Digital Radio Receivers
s Spectrum Analysis
s Low Power and Battery-Operated Systems
s Handheld or Portable Instruments
s Imaging Systems
, LTC and LT are registered trademarks of Linear Technology Corporation.
MICROWIRE is a trademark of National Semiconductor Corp.
The LTC®1402 is a 12-bit, 2.2Msps sampling A/D con-
verter. This high performance device includes a high dy-
namic range sample-and-hold and a precision reference.
It operates from a single 5V supply or dual ±5V supplies
and draws only 90mW from 5V.
The versatile differential input offers a unipolar range of
4.096V and a bipolar range of ±2.048V for dual supply
systems where high performance op amps perform best,
eliminating the need for special translation circuitry.
The high common mode rejection allows users to elimi-
nate ground loops and common mode noise by measuring
signals differentially from the source.
Outstanding AC performance includes 72dB S/(N + D) and
–93dB SFDR at the Nyquist input frequency of 1.1MHz
with dual ±5V supplies and –84dB SFDR with a single 5V
supply.
The LTC1402 has two power saving modes: Nap and
Sleep. Nap mode consumes only 15mW of power and
Sleep can wake up and convert immediately. In Sleep
mode, it typically consumes 10µW of power. Upon power-
up from Sleep mode, a reference ready (REFRDY) signal
is available in the serial data word to indicate that the
reference has settled and the chip is ready to convert.
The 3-wire serial port allows compact and efficient data
transfer to a wide range of microprocessors, microcon-
trollers and DSPs. A digital output driver power supply pin
allows direct connection to 3V or lower logic.
BLOCK DIAGRA
10µF
+AIN
–AIN
VREF
10µF
3
4
5
SAMPLE-
AND-HOLD
4.096V
64k
–
7
GAIN
64k
LTC1402
+
14 VSS
10µF
–5V OR 0V
1 AVDD
5V 3V OR 5V
12 DVDD 11 OVDD
12-BIT ADC
OUTPUT
BUFFER
10
DOUT
2.048
REFERENCE
2 AGND1 6 AGND2
TIMING
LOGIC
13 DGND 9 OGND
8
BIP/UNI
16 CONV
15
SCK
1402 TA01
5 Harmonic THD, 2nd, 3rd and SFDR
vs Input Frequency (Unipolar)
0
THD
–10 SFDR
–20 2ND
–30 3RD
–40 fSAMPLE = 2.22MHz
–50
–60
–70
–80
–90
–100
–110
–120
104
105 106
INPUT FREQUENCY (Hz)
107
1401 G05
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
1
1 page  
LTC1402
ELECTRICAL CHARACTERISTICS
Note 12: The absolute voltage at AIN+ and AIN– must be within this range.
Note 13: If less than 7.3ns is allowed, the output data will appear one
clock cycle later. It is best for CONV to rise half a clock before SCK, when
running the clock at rated speed.
Note 14: Not the same as aperture delay. Aperture delay is smaller (2.6ns)
because the 0.8ns delay through the sample-and-hold is subtracted from
the CONV to Hold mode delay.
Note 15: The rising edge of SCK is guaranteed to catch the data coming
out into a storage latch.
Note 16: The Sample mode is started by the 14th rising clock and it is
ended by the rising edge of convert. Because the start of Sample mode is
slower than the end of Sample mode, the sample time is 6ns less than the
delay between the 14th SCK and CONV.
Note 17: The internal reference settles in 2ms after it wakes up from Sleep
mode with one or more cycles at SCK and a 10µF capacitive load. The
Sleep mode resets the REFREADY bit in the DOUT sequence. The
REFREADY bit goes high again 10ms after the VREF has stopped slewing in
wake up. This ensures valid REFREADY bit operation even with higher load
capacitances at VREF.
Note 18: The full power bandwidth is the frequency where the output code
swing drops to 2828LSBs with a 4VP-P input sine wave.
TYPICAL PERFOR A CE CHARACTERISTICS (Bipolar Mode Plots Run with Dual ±5V Supplies.
Unipolar Mode Plots Run with a Single 5V Supply. VDD = 5V, VSS = – 5V for Bipolar, VDD = 5V, VSS = 0V for Unipolar), TA = 25°C.
ENOBs and SINAD
vs Input Frequency (Bipolar)
12 74
11 68
10 62
9 56
8 50
7 44
6 38
5 32
4 26
3 20
2 14
1 fSAMPLE = 2.22MHz
0
104 105
106
INPUT FREQUENCY (Hz)
8
2
107
1401 G01
ENOBs and SINAD
vs Input Frequency (Unipolar)
12 74
11 68
10 62
9 56
8 50
7 44
6 38
5 32
4 26
3 20
2 14
1 fSAMPLE = 2.22MHz
0
104 105
106
INPUT FREQUENCY (Hz)
8
2
107
1401 G04
5 Harmonic THD, 2nd, 3rd and
SFDR vs Input Frequency
(Bipolar)
0
THD
–10 SFDR
–20 2ND
–30 3RD
–40 fSAMPLE = 2.22MHz
–50
–60
–70
–80
–90
–100
–110
–120
104
105 106
INPUT FREQUENCY (Hz)
107
1401 G02
SNR vs Input Frequency (Bipolar)
–2
–8 fSAMPLE = 2.22MHz
–14
–20
–26
–32
–38
–44
–50
–56
–62
–68
–74
104
105 106
INPUT FREQUENCY (Hz)
107
1401 G03
5 Harmonic THD, 2nd, 3rd and
SFDR vs Input Frequency
(Unipolar)
0
THD
–10 SFDR
–20 2ND
–30 3RD
–40 fSAMPLE = 2.22MHz
–50
–60
–70
–80
–90
–100
–110
–120
104
105 106
INPUT FREQUENCY (Hz)
107
1401 G05
SNR vs Input Frequency (Unipolar)
–2
–8 fSAMPLE = 2.22MHz
–14
–20
–26
–32
–38
–44
–50
–56
–62
–68
–74
104
105 106
INPUT FREQUENCY (Hz)
107
1401 G06
5
5 Page 
LTC1402
APPLICATIONS INFORMATION
LT1630: Dual 30MHz Rail-to-Rail Voltage FB Amplifier.
2.7V to ±15V supplies. Very high AVOL, 500µV offset and
520ns settling to 0.5LSB for a 4V swing. THD and noise
are – 93dB to 40kHz and below 1LSB to 320kHz (AV = 1,
2VP-P into 1kΩ, VS = 5V), making the part excellent for AC
applications (to 1/3 Nyquist) where rail-to-rail perfor-
mance is desired. Quad version is available as LT1631.
LT1632: Dual 45MHz Rail-to-Rail Voltage FB Amplifier.
2.7V to ±15V supplies. Very high AVOL, 1.5mV offset and
400ns settling to 0.5LSB for a 4V swing. It is suitable for
applications with a single 5V supply. THD and noise are
– 93dB to 40kHz and below 1LSB to 800kHz (AV = 1,
2VP-P into 1kΩ, VS = 5V), making the part excellent for AC
applications where rail-to-rail performance is desired.
Quad version is available as LT1633.
LT1813: Dual 100MHz 750V/µs 3mA Voltage Feedback
Amplifier. 5V to ±5V supplies. Distortion is – 86dB to
100kHz and – 77dB to 1MHz with ±5V supplies (2VP-P into
500Ω). Excellent part for fast AC applications with ±5V
supplies.
INPUT FILTERING AND SOURCE IMPEDANCE
The noise and the distortion of the input amplifier and
other circuitry must be considered since they will add to
the LTC1402 noise and distortion. The small-signal band-
width of the sample-and-hold circuit is 80MHz. Any noise
or distortion products that are present at the analog inputs
will be summed over this entire bandwidth. Noisy input
circuitry should be filtered prior to the analog inputs to
minimize noise. A simple 1-pole RC filter is sufficient for
many applications. For example, Figure 2 shows a 68pF
capacitor from AIN+ to ground and a 51Ω source resistor
to limit the input bandwidth to 47MHz. The 68pF capacitor
also acts as a charge reservoir for the input sample-and-
hold and isolates the ADC input from sampling glitch-
sensitive circuitry.
High quality capacitors and resistors should be used since
these components can add distortion. NPO and silver mica
type dielectric capacitors have excellent linearity.
Carbon surface mount resistors can generate distortion
from self heating and from damage that may occur during
soldering. Metal film surface mount resistors are much
ANALOG 51Ω
INPUT
3
68pF
4
AIN+
AIN–
2
5
10µF
6
AGND1
LTC1402
VREF
AGND2
7
GAIN
1402 F02
Figure 2. RC Input Filter
less susceptible to both problems. When high amplitude
unwanted signals are close in frequency to the desired signal
frequency, a multiple pole filter is required. Figure 3 shows
a simple implementation using an LTC1560-1 fifth order
elliptic continuous-time 1MHz filter.
18
VIN 2
3
LTC1560-1
7
6
4
– 5V
0.1µF
5
5V
0.1µF
3 AIN+
4 AIN–
2
5
10µF
6
AGND1
LTC1402
VREF
AGND2
7
GAIN
1402 F03
Figure 3. 1MHz Fifth Order Elliptic Lowpass Filter
BIPOLAR AND UNIPOLAR INPUT RANGES
The ±2V bipolar input range of the LTC1402 is optimized
for low noise and low distortion. Most op amps also
perform best over this same range, allowing direct cou-
pling to the analog inputs and eliminating the need for
special translation circuitry. The inputs of the LTC1402
may also be driven fully differential in bipolar mode with
a single supply. Each input should not swing more than
2VP-P individually to get the best performance from single
supply amplifiers.
The 0V to 4V range is ideal for single ended input use with
single supply applications.
11
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| PDF Descargar | [ Datasheet LTC1402IGN.PDF ] | |
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