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PDF SAA2505 Data sheet ( Hoja de datos )
| Número de pieza | SAA2505 | |
| Descripción | Digital multi-channel audio IC DUET | |
| Fabricantes | Philips | |
| Logotipo |  |
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INTEGRATED CIRCUITS
DATA SHEET
SAA2505H
Digital multi-channel audio IC
(DUET)
Preliminary specification
File under Integrated Circuits, IC01
1998 Mar 10
1 page  
Philips Semiconductors
Digital multi-channel audio IC (DUET)
Preliminary specification
SAA2505H
PINNING
SYMBOL
PIN
DRIVE/
LOAD(1)
TYPE
DESCRIPTION
STANDALONE 1 A I select stand-alone mode input
EFO1
2 F O output flag FO1; from DSP2
EFO2
3 F O output flag FO2; from DSP2
EFO3
4 F O output flag FO3; from DSP2
EFO4
5 F O output flag FO4; from DSP1
EFO5
6 F O output flag FO5; from DSP1
EFO6
7 F O output flag FO6; from DSP1
VSSDI
VDDDI
EFI1
8 − S digital ground for internal logic and memories; note 2
9 − S digital supply voltage for internal logic and memories (+3.3 V); note 3
10 A
I input flag FI1; to DSP2
EFI2
11 A
I input flag FI2; to DSP1
EFI3
12 A
I input flag FI3; to DSP1
VDDDE
WSO
13 −
S digital supply voltage for I/O cells (+3.3 V); note 4
14 G I/O word select input/output for ports 0 to 2; also used for output port 3
when not in quad mode (I2S-bus)
SCK
15 G I/O serial clock input/output for ports 0 to 2; also used for output port 3
when not in quad mode (I2S-bus)
VSSDE
SDO0
SDO1
16 −
S digital ground for I/O cells; note 5
17 F O serial data output for port 0 (I2S-bus)
18 F O serial data output for port 1 (I2S-bus)
VDDDE
VSSDI
VDDDI
VSSDI
VDDDI
VDDDI
VSSDI
VDDDE
SDO2
SDO3
VSSDE
WSO3
SCKO3
VDDDE
SDB
19 −
S digital supply voltage for I/O cells (+3.3 V); note 4
20 −
S digital ground for internal logic and memories; note 2
21 −
S digital supply voltage for internal logic and memories (+3.3 V); note 3
22 −
S digital ground for internal logic and memories; note 2
23 −
S digital supply voltage for internal logic and memories (+3.3 V); note 3
24 −
S digital supply voltage for internal logic and memories (+3.3 V); note 3
25 −
S digital ground for internal logic and memories; note 2
26 −
S digital supply voltage for I/O cells (+3.3 V); note 4
27 F O serial data output for port 2 (I2S-bus)
28 F O serial data output for port 3 (I2S-bus)
29 −
S digital ground for I/O cells; note 5
30 F O word select output for port 3; used in quad mode (I2S-bus)
31 F O serial clock output for port 3; used in quad mode (I2S-bus)
32 −
S digital supply voltage for I/O cells (+3.3 V); note 4
33 F O serial data begin output for port 3; used in quad mode (I2S-bus)
SPDIF
VSSDE
VSSDI
VDDDI
34 F O SPDIF output
35 −
S digital ground for I/O cells; note 5
36 −
S digital ground for internal logic and memories; note 2
37 −
S digital supply voltage for internal logic and memories (+3.3 V); note 3
1998 Mar 10
5
5 Page 
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Table 3 I2C-bus control register
SECTION
General
REGISTER NAME
SOFT_RESET
MEMORY
ADDRESS
$8 000-b0
General
SYSCLCKEN
$8 000-b1
General
SYSCLKDIV
$8 000-b3 and b2
General
General
General
General
General
General
EN_INP_INT_DSP1 $8 000-b4
EN_OUTP_INT_DSP1 $8 000-b5
EN_INP_INT_DSP1 $8 000-b6
EN_OUTP_INT_DSP1 $8 000-b7
ACLKSEL
$8 000-b8
MEMCONFIG
$8 000-b9
I2SCONTROL IISMODE
$8 001-b1 and b0
I2SCONTROL IISINP
I2SCONTROL IISI_SDB_EN
$8 001-b2
$8 001-b3
DEFAULT VALUE
1(1) 2(2) 3(3)
DESCRIPTION
00
0 0: operation
1: reset
0 note 4 1 0: enable SYSCLK output
1: disable SYSCLK output
00 note 4 10 00: SYSCLK = 1⁄4CLK
01: SYSCLK = 1⁄2CLK
10: SYSCLK = CLK
11: reserved
0 note 4 1 0: disable input interrupts on DSP1
1: enable input interrupts on DSP1
0 note 4 0 0: disable output interrupts on DSP1
1: enable output interrupts on DSP1
0 note 4 1 0: disable input interrupts on DSP2
1: enable input interrupts on DSP2
0 note 4 0 0: disable output interrupts on DSP2
1: enable output interrupts on DSP2
0 note 4 0 0: ACLK = 256fs
1: ACLK = 384fs
0 note 4 0 0: program memory on DSP1 = 12 kbytes
0: program memory on DSP2 = 8 kbytes
1: program memory on DSP1 = 8 kbytes
1: program memory on DSP2 = 12 kbytes
00 note 4 00 00: I2S-bus/EIAJ input format
01: reserved
10: reserved
11: reserved
0 note 4 0 0: I2S-bus input format
1: EIAJ 16-bit input format
0 note 4 0 0: SDBI is DSP1 Input flag
1: SDBI is aligned to WS to allow multi-channel I2S-bus input
11 Page | ||
| Páginas | Total 28 Páginas | |
| PDF Descargar | [ Datasheet SAA2505.PDF ] | |
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