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S80C652FHBB Schematic ( PDF Datasheet ) - Philips

Teilenummer S80C652FHBB
Beschreibung CMOS single-chip 8-bit microcontroller
Hersteller Philips
Logo Philips Logo 




Gesamt 28 Seiten
S80C652FHBB Datasheet, Funktion
INTEGRATED CIRCUITS
87C654
CMOS single-chip 8-bit microcontroller
Product specification
IC20 Data Handbook
1996 Aug 16
Philips
Semiconductors






S80C652FHBB Datasheet, Funktion
Philips Semiconductors
CMOS single-chip 8-bit microcontroller
BLOCK DIAGRAM
FREQUENCY
REFERENCE
XTAL2 XTAL1
OSCILLATOR
AND
TIMING
PROGRAM
MEMORY
(16K x 8
EPROM)
DATA
MEMORY
(256 x 8 RAM)
COUNTERS
T0 T1
TWO 16-BIT
TIMER/EVENT
COUNTERS
Product specification
87C654
CPU
I2C SERIAL I/O
SDA SHARED
WITH
SCL PORT 1
INTERNAL
INTERRUPTS
64K BYTE BUS
EXPANSION
CONTRTOL
PROGRAMMABLE I/O
PROG SERIAL PORT
FULL DUPLEX UART
SYNCHRONOUS SHIFT
INT0 INT1
EXTERNAL
INTERRUPTS
CONTROL
PARALLEL PORTS,
ADDRESS/DATA BUS
AND I/O PINS
SERIAL IN SERIAL OUT
SHARED WITH
PORT 3
SU00271
1996 Aug 16
6

6 Page









S80C652FHBB pdf, datenblatt
Philips Semiconductors
CMOS single-chip 8-bit microcontroller
Product specification
87C654
NOTES FOR DC ELECTRICAL CHARACTERISTICS:
1. The input threshold voltage of P1.6 and P1.7 (SIO1) meets the I2C specification, so an input voltage below 0.3VCC will be recognized as a
logic 0 while an input voltage above 0.7VCC will be recognized as a logic 1.
2. Capacitive loading on ports 0 and 2 may cause spurious noise to be superimposed on the VOLs of ALE and ports 1 and 3. The noise is due
to external bus capacitance discharging into the port 0 and port 2 pins when these pins make 1-to-0 transitions during bus operations. In the
worst cases (capacitive loading > 100pF), the noise pulse on the ALE pin may exceed 0.8V. In such cases, it may be desirable to qualify
ALE with a Schmitt Trigger, or use an address latch with a Schmitt Trigger STROBE input. IOL can exceed these conditions provided that no
single output sinks more than 5mA and no more than two outputs exceed the test conditions.
3. Under steady state (non-transient) conditions, IOL must be externally limited as follows: Maximum IOL = 10mA per port pin; Maximum
IOL = 26mA total for Port 0; Maximum IOL = 15mA total for Ports 1, 2, and 3; Maximum IOL = 71mA total for all output pins. If IOL exceeds the
test conditions, VOL may exceed the related specification. Pins are not guaranteed to sink current greater than the listed test conditions.
4. Capacitive loading on ports 0 and 2 may cause the VOH on ALE and PSEN to momentarily fall below the 0.9VCC specification when the
address bits are stabilizing.
5. Pins of ports 1 , 2, and 3 source a transition current when they are being externally driven from 1 to 0. The transition current reaches its
maximum value when VIN is approximately 2V.
6. See Figures 9 through 11 for ICC test conditions.
7. The operating supply current is measured with all output pins disconnected; XTAL1 driven with tr = tf = 10ns;
VIL = VSS + 0.5V; VIH = VCC –0.5V; XTAL2 not connected; EA = RST = Port 0 = P1.6 = P1.7 = VCC; fCLK = 16MHz. See Figure 9.
8. The idle mode supply current is measured with all output pins disconnected; XTAL1 driven with tr = tf = 10ns; VIL = VSS + 0.5V;
VIH = VCC –0.5V; XTAL2 not connected; Port 0 = P1.6 = P1.7 = VCC; EA = RST = VSS; fCLK = 16MHz. See Figure 10.
9. The power-down current is measured with all output pins disconnected; XTAL2 not connected; Port 0 = P1.6 = P1.7 = VCC;
EA = RST = VSS. See Figure 11.
10. 2V VPD VCCmax.
1996 Aug 16
12

12 Page





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