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PDF LTC1143L Data sheet ( Hoja de datos )
| Número de pieza | LTC1143L | |
| Descripción | Dual High Efficiency SO-16 Step-Down Switching Regulator Controllers | |
| Fabricantes | Linear Technology | |
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LTC1143/LTC1143L
LTC1143L-ADJ
Dual High Efficiency SO-16
Step-Down Switching Regulator
Controllers
FEATURES
DESCRIPTION
s Dual Outputs
LTC1143, LTC1143L: 3.3V, 5V
LTC1143L-ADJ: Dual Adjustable
s Very High Efficiency: Over 95% Possible
s Current Mode Operation for Excellent Line and Load
Transient Response
s High Efficiency Maintained over Three Decades of
Output Current
s Low Standby Current at Light Loads: 160µA/Output
s Logic-Controlled Shutdown (LTC1143, LTC1143L)
s Wide VIN Range: 3.5V to 16V
(LTC1143L, LTC1143L-ADJ)
s Very Low Dropout Operation: 100% Duty Cycle
s Available in Narrow 16-Pin SO Package
U
APPLICATIONS
The LTC1143 series is a dual step-down switching regulator
controller featuring automatic Burst ModeTM operation to
maintain high efficiencies at low output currents. This
device is composed of two separate regulator blocks,
each driving an external power MOSFET at switching
frequencies up to 400kHz using a constant off-time current
mode architecture. Both fixed and adjustable voltages are
available.
The operating current level for both regulators is user-
programmable via an external current sense resistor.
Wide input supply range allows operation from 4V to 14V
(16V maximum). The LTC1143L and LTC1143L-ADJ
extend operation to VIN = 3.5V. 100% duty cycle provides
low dropout regulation limited only by the RDS(ON) of the
external MOSFET and resistance of the inductor and
current sense resistor.
s Personal Digital Assistants
s Notebook and Palmtop Computers
s Battery-Operated Digital Devices
s Portable Instruments
s DC Power Distribution Systems
The LTC1143 series is ideal for applications requiring dual
output voltages with high conversion efficiencies over a
wide load current range in a small amount of board space.
, LTC and LT are registered trademarks of Linear Technology Corporation.
Burst Mode is a trademark of Linear Technology Corporation.
TYPICAL APPLICATION
VIN
4V TO 14V
VOUT1
3.3V/2A
RSENSE1
0.05Ω
+ CIN1
22µF
25V
×2
L1
27µH
0.22µF
P1A
13
VIN1
4
P-DRIVE 1
1 SENSE+ 1
0.22µF
5
VIN2
12
P-DRIVE 2
P1B
SENSE+ 2 9
+ CIN2
22µF
25V
×2
L2
27µH
RSENSE2
0.05Ω
1000pF
LTC1143L-ADJ
1000pF
COUT1
220µF
10V
×2
+
R1
49.9k
1%
R2
82.5k
1%
100pF
SENSE– 1
D1 16
MBRS320T3
2 VFB1
GND1
3
CT1
14
ITH1
15
RC1
1k
ITH2 CT2
76
RC2
1k
SENSE– 2
8
D2
MBRS320T3
VFB2 10
GND2
11
R4
49.9k
1%
+
100pF
R3
49.9k
1%
L1, L2: SUMIDA CDRH125-270
CT1
300pF
CC1 CC2
3300pF 3300pF
CT2
300pF
P1: SILICONIX Si4953DY/FAIRCHILD NDS8947
RSENSE1, RSENSE2: DALE WSL-2010-.05
Figure 1. High Efficiency Dual 3.3V/2.5V Regulator
VOUT2
2.5V/2A
COUT2
220µF
10V
×2
1143 F01
1
1 page  
TYPICAL PERFORMANCE CHARACTERISTICS
Gate Charge Supply Current
14
12
10 QP = 100nC
8
6
4
QP = 29nC
2
0
20 80 140 200 260
OPERATING FREQUENCY (kHz)
LTC1143 G10
Off-Time vs VOUT
80
70
VSENSE = VOUT
60
50
40
30
20
10
0
0
VOUT = 3.3V
VOUT = 5V
1 2 345
OUTPUT VOLTAGE (V)
LTC1143 G11
LTC1143/LTC1143L
LTC1143L-ADJ
Current Sense Threshold Voltage
175
MAXIMUM
150 THRESHOLD
125
100
75
50
MINIMUM
25 THRESHOLD
0
0 20 40 60 80 100
TEMPERATURE (°C)
LTC1143 G12
PIN FUNCTIONS
LTC1143/LTC1143L
SENSE+3 (Pin 1): The (+) Input to the 3.3V Section Current
Comparator. A built-in offset between Pins 1 and 16 in
conjunction with RSENSE 3 sets the current trip threshold
for the 3.3V section.
SHUTDOWN 3 (Pin 2): When grounded, the 3.3V section
operates normally. Pulling Pin 2 high holds the MOSFET
off and puts the 3.3V section in micropower shutdown
mode. Requires CMOS logic level signal with tr, tf < 1µs.
Do not “float” Pin 2.
GND3 (Pin 3): 3.3V Section Ground. Two independent
ground lines must be routed separately from other grounds
to: 1) the (–) terminal of the 3.3V section output capacitor
and 2) the cathode of the Schottky diode D1 and (–)
terminal of CIN3 (see Figure 9).
P-DRIVE 3 (Pin 4): High Current Drive for Top P-Channel
MOSFET, 3.3V Section. Voltage swing at this pin is from
VIN3 to ground.
VIN5 (Pin 5): Supply Pin, 5V Section. Must be closely
decoupled to 5V power ground Pin 11.
CT5 (Pin 6): External capacitor CT5 from Pin 6 to ground sets
the operating frequency for the 5V section. (The actual
frequency is also dependent upon the input voltage.)
ITH5 (Pin 7): Gain Amplifier Decoupling Point, 5V Section.
The 5V section current comparator threshold increases
with the Pin 7 voltage.
SENSE– 5 (Pin 8): Connects to internal resistive divider
which sets the output voltage for the 5V section. Pin 8 is
also the (–) input for the current comparator on the 5V
section.
SENSE+ 5 (Pin 9): The (+) Input to the 5V Section Current
Comparator. A built-in offset between Pins 9 and 8 in
conjunction with RSENSE 5 sets the current trip threshold
for the 5V section.
SHUTDOWN 5 (Pin 10): When grounded, the 5V section
operates normally. Pulling Pin 10 high holds the 5V section
MOSFET off and puts the 5V section in micropower shut-
downmode.RequiresCMOSlogiclevelsignalwithtr,tf <1µs.
Do not “float” Pin 10.
GND5 (Pin 11): 5V Section Ground. Two independent
ground lines must be routed separately from other grounds
to: 1) the (–) terminal of the 5V section output capacitor
and 2) the cathode of the Schottky diode D2 and (–)
terminal of CIN5 (see Figure 9).
P-DRIVE 5 (Pin 12): High Current Drive for Top P-Channel
MOSFET, 5V Section. Voltage swing at this pin is from
VIN5 to ground.
5
5 Page 
LTC1143/LTC1143L
LTC1143L-ADJ
APPLICATIONS INFORMATION
but δ = 0.005/°C can be used as an approximation for low
voltage MOSFETs.
When selecting the P-channel power MOSFET for each
section, consideration should be given to using a dual MOSFET
with the other half used for the second regulator. Assuming
both sections are operating at similar currents, the required
RDS(ON) will be half the value of a single MOSFET to stay within
the package dissipation limit. Remember that worst-case
MOSFET dissipation occurs at minimum VIN.
Output Diode Selection (D1, D2)
The Schottky diodes D1 and D2 shown in Figure 1 conduct
during the off-time. It is important to adequately specify
the diode peak current and average power dissipation to
not exceed the diode ratings.
The most stressful condition for the output diode is under
short circuit (VOUT = 0V). Under this condition the diode
must safely handle ISC(PK) at close to 100% duty cycle.
Under normal load conditions the average current con-
ducted by the diode is:
( ) ( )IDIODE =
VIN − VOUT + VD
VIN
ILOAD
Remember to keep lead lengths short and observe proper
grounding (see Board Layout Checklist) to avoid ringing
and increased dissipation.
The forward voltage drop allowable in the diode is calcu-
lated from the maximum short-circuit current as:
VF
≈
PD
ISC(PK)
where PD is the allowable power dissipation and will be
determined by efficiency and/or thermal requirements
(see Efficiency Considerations).
CIN and COUT Selection
In continuous mode, the source current of the P-channel
MOSFET is a square wave of duty cycle VOUT/ VIN. To
prevent large voltage transients, a low effective series
resistance (ESR) input capacitor sized for the maximum
RMS current must be used. The maximum RMS capacitor
current is given by:
[ ( )]1/2
VOUT VIN − VOUT
CIN Required IRMS ≈ IMAX
VIN
This formula has a maximum at VIN = 2VOUT, where IRMS
= IOUT/2. This simple worst-case condition is commonly
used for design because even significant deviations do not
offer much relief. Note that capacitor manufacturer’s
ripple current ratings are often based on only 2000 hours
of life. This makes it advisable to further derate the
capacitor, or to choose a capacitor rated at a higher
temperature than required. Several capacitors may also be
paralleled to meet size or height requirements in the
design. Always consult the manufacturer if there is any
question. An additional 0.1µF to 1µF ceramic capacitor is
also required on each VIN line (Pins 5, 13) for high
frequency decoupling.
The selection of COUT is driven by the required (ESR). The
ESR of COUT must be less than twice the value of RSENSE
for proper operation of the LTC1143 series:
COUT Required ESR < 2RSENSE
Optimum efficiency is obtained by making the ESR equal
to RSENSE. As the ESR is increased up to 2RSENSE the
efficiency degrades by less than 1%. If the ESR is greater
than 2RSENSE, the voltage ripple on the output capacitor
will prematurely trigger Burst Mode operation, resulting in
disruption of continuous mode and an efficiency hit which
can be several percent.
Manufacturers such as Nichicon and United Chemicon
should be considered for high performance capacitors.
The OS-CON semiconductor dielectric capacitor available
from Sanyo has the lowest ESR size/ratio of any aluminum
electrolytic at a somewhat higher price. Once the ESR
requirement for COUT has been met, the RMS current
rating generally far exceeds the IRIPPLE(P-P) requirement.
In surface mount applications multiple capacitors may
have to be parallel to meet the capacitance, ESR or RMS
current handling requirements of the application.
11
11 Page | ||
| Páginas | Total 20 Páginas | |
| PDF Descargar | [ Datasheet LTC1143L.PDF ] | |
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