Datenblatt-pdf.com


P51XAG30KFA Schematic ( PDF Datasheet ) - NXP Semiconductors

Teilenummer P51XAG30KFA
Beschreibung XA 16-bit microcontroller family 32K/512 OTP/ROM/ROMless / watchdog / 2 UARTs
Hersteller NXP Semiconductors
Logo NXP Semiconductors Logo 




Gesamt 36 Seiten
P51XAG30KFA Datasheet, Funktion
INTEGRATED CIRCUITS
XA-G3
XA 16-bit microcontroller family
32K/512 OTP/ROM/ROMless, watchdog, 2 UARTs
Product specification
Supersedes data of 1998 Aug 14
IC25 Data Handbook
1999 Apr 07
Philips
Semiconductors






P51XAG30KFA Datasheet, Funktion
Philips Semiconductors
XA 16-bit microcontroller family
32K/512 OTP/ROM/ROMless, watchdog, 2 UARTs
Product specification
XA-G3
PIN. NO.
MNEMONIC
TYPE
PLCC LQFP
NAME AND FUNCTION
PSEN
32 26 O Program Store Enable: The read strobe for external program memory. When the microcontroller
accesses external program memory, PSEN is driven low in order to enable memory devices. PSEN
is only active when external code accesses are performed.
EA/WAIT/
VPP
35
29
I External Access/Wait: The EA input determines whether the internal program memory of the
microcontroller is used for code execution. The value on the EA pin is latched as the external reset
input is released and applies during later execution. When latched as a 0, external program
memory is used exclusively, when latched as a 1, internal program memory will be used up to its
limit, and external program memory used above that point. After reset is released, this pin takes on
the function of bus Wait input. If Wait is asserted high during any external bus access, that cycle
will be extended until Wait is released. During EPROM programming, this pin is also the
programming supply voltage input.
XTAL1
21 15
I Crystal 1: Input to the inverting amplifier used in the oscillator circuit and input to the internal clock
generator circuits.
XTAL2
20 14
O Crystal 2: Output from the oscillator amplifier.
SPECIAL FUNCTION REGISTERS
NAME
DESCRIPTION
SFR
ADDRESS MSB
BIT FUNCTIONS AND ADDRESSES
RESET
LSB VALUE
BCR
BTRH
BTRL
CS
DS
ES
Bus configuration register
Bus timing register high byte
Bus timing register low byte
Code segment
Data segment
Extra segment
IEH*
Interrupt enable high byte
IEL* Interrupt enable low byte
46A — — — WAITD BUSD BC2 BC1 BC0 Note 1
469 DW1 DW0 DWA1 DWA0 DR1 DR0 DRA1 DRA0 FF
468 WM1 WM0 ALEW — CR1 CR0 CRA1 CRA0 EF
443 00
441 00
442 00
33F 33E 33D 33C 33B 33A 339 338
427 — — — — ETI1 ERI1 ETI0 ERI0 00
337 336 335 334 333 332 331 330
426 EA — — ET2 ET1 EX1 ET0 EX0 00
IPA0
IPA1
IPA2
IPA4
IPA5
Interrupt priority 0
Interrupt priority 1
Interrupt priority 2
Interrupt priority 4
Interrupt priority 5
P0* Port 0
P1* Port 1
P2* Port 2
4A0 — PT0 — PX0 00
4A1 — PT1 — PX1 00
4A2 — — — PT2 00
4A4 — PTI0 — PRI0 00
4A5 — PTI1 — PRI1 00
387 386 385 384 383 382 381 380
430
AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0
FF
38F 38E 38D 38C 38B 38A 389 388
431 T2EX T2 TxD1 RxD1 A3 A2 A1 WRH FF
397 396 395 394 393 392 391 390
432
P2.7 P2.6 P2.5 P2.4 P2.3 P2.2 P2.1 P2.0
FF
1999 Apr 07
6

6 Page









P51XAG30KFA pdf, datenblatt
Philips Semiconductors
XA 16-bit microcontroller family
32K/512 OTP/ROM/ROMless, watchdog, 2 UARTs
Product specification
XA-G3
timer register is loaded with FFFF hex. The underflow also sets the
TF2 flag, which can generate an interrupt if enabled.
The external flag EXF2 toggles when Timer 2 underflows or
overflows. This EXF2 bit can be used as a 17th bit of resolution, if
needed. the EXF2 flag does not generate an interrupt in this mode.
As the baud rate generator, timer T2 is incremented by TCLK.
Baud Rate Generator Mode
By setting the TCLKn and/or RCLKn in T2CON or T2MOD, the
Timer 2 can be chosen as the baud rate generator for either or both
UARTs. The baud rates for transmit and receive can be
simultaneously different.
Programmable Clock-Out
A 50% duty cycle clock can be programmed to come out on P1.6.
This pin, besides being a regular I/O pin, has two alternate
functions. It can be programmed (1) to input the external clock for
Table 1. Timer 2 Operating Modes
TR2
CP/RL2
RCLK+TCLK
0XX
100
100
110
1X1
DCEN
X
0
1
X
X
Timer/Counter 2 or (2) to output a 50% duty cycle clock ranging from
3.58Hz to 3.75MHz at a 30MHz operating frequency.
To configure the Timer/Counter 2 as a clock generator, bit C/T2 (in
T2CON) must be cleared and bit T20E in T2MOD must be set. Bit
TR2 (T2CON.2) also must be set to start the timer.
The Clock-Out frequency depends on the oscillator frequency and
the reload value of Timer 2 capture registers (TCAP2H, TCAP2L) as
shown in this equation:
TCLK
2 (65536 * TCAP2H, TCAP2L)
In the Clock-Out mode Timer 2 roll-overs will not generate an
interrupt. This is similar to when it is used as a baud-rate generator.
It is possible to use Timer 2 as a baud-rate generator and a clock
generator simultaneously. Note, however, that the baud-rate will be
1/8 of the Clock-Out frequency.
MODE
Timer off (stopped)
16-bit auto-reload, counting up
16-bit auto-reload, counting up or down depending on T2EX pin
16-bit capture
Baud rate generator
TSTAT
Address:411
Bit Addressable
Reset Value: 00H
MSB
LSB
— — — — — T1OE — T0OE
BIT
TSTAT.2
TSTAT.0
SYMBOL
T1OE
T0OE
FUNCTION
When 0, this bit allows the T1 pin to clock Timer 1 when in the counter mode.
When 1, T1 acts as an output and toggles at every Timer 1 overflow.
When 0, this bit allows the T0 pin to clock Timer 0 when in the counter mode.
When 1, T0 acts as an output and toggles at every Timer 0 overflow.
SU00612B
Figure 5. Timer 0 And 1 Extended Status (TSTAT)
T2MOD
Address:419
Bit Addressable
Reset Value: 00H
MSB
— RCLK1 TCLK1 —
LSB
— T2OE DCEN
BIT
T2MOD.5
T2MOD.4
T2MOD.1
T2MOD.0
SYMBOL
RCLK1
TCLK1
T2OE
DCEN
FUNCTION
Receive Clock Flag.
Transmit Clock Flag. RCLK1 and TCLK1 are used to select Timer 2 overflow rate as a clock source
for UART1 instead of Timer T1.
When 0, this bit allows the T2 pin to clock Timer 2 when in the counter mode.
When 1, T2 acts as an output and toggles at every Timer 2 overflow.
Controls count direction for Timer 2 in autoreload mode.
DCEN=0 counter set to count up only
DCEN=1 counter set to count up or down, depending on T2EX (see text).
SU00610B
Figure 6. Timer 2 Mode Control (T2MOD)
1999 Apr 07
12

12 Page





SeitenGesamt 36 Seiten
PDF Download[ P51XAG30KFA Schematic.PDF ]

Link teilen




Besondere Datenblatt

TeilenummerBeschreibungHersteller
P51XAG30KFAXA 16-bit microcontroller family 32K/512 OTP/ROM/ROMless / watchdog / 2 UARTsNXP Semiconductors
NXP Semiconductors
P51XAG30KFBDXA 16-bit microcontroller family 32K/512 OTP/ROM/ROMless / watchdog / 2 UARTsNXP Semiconductors
NXP Semiconductors

TeilenummerBeschreibungHersteller
CD40175BC

Hex D-Type Flip-Flop / Quad D-Type Flip-Flop.

Fairchild Semiconductor
Fairchild Semiconductor
KTD1146

EPITAXIAL PLANAR NPN TRANSISTOR.

KEC
KEC


www.Datenblatt-PDF.com       |      2020       |      Kontakt     |      Suche