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N83C196KC20 Schematic ( PDF Datasheet ) - Intel Corporation

Teilenummer N83C196KC20
Beschreibung COMMERCIAL/EXPRESS CHMOS MICROCONTROLLER
Hersteller Intel Corporation
Logo Intel Corporation Logo 




Gesamt 25 Seiten
N83C196KC20 Datasheet, Funktion
8XC196KC 8XC196KC20
COMMERCIAL EXPRESS CHMOS
MICROCONTROLLER
87C196KC 16 Kbytes of On-Chip OTPROM
83C196KC 16 Kbytes ROM
80C196KC ROMless
Y 16 and 20 MHz Available
Y 488 Byte Register RAM
Y Register-to-Register Architecture
Y 28 Interrupt Sources 16 Vectors
Y Peripheral Transaction Server
Y 1 4 ms 16 x 16 Multiply (20 MHz)
Y 2 4 ms 32 16 Divide (20 MHz)
Y Powerdown and Idle Modes
Y Five 8-Bit I O Ports
Y 16-Bit Watchdog Timer
Y Extended Temperature Available
Y Dynamically Configurable 8-Bit or
16-Bit Buswidth
Y Full Duplex Serial Port
Y High Speed I O Subsystem
Y 16-Bit Timer
Y 16-Bit Up Down Counter with Capture
Y 3 Pulse-Width-Modulated Outputs
Y Four 16-Bit Software Timers
Y 8- or 10-Bit A D Converter with
Sample Hold
Y HOLD HLDA Bus Protocol
Y OTPROM One-Time Programmable
Version
The 80C196KC 16-bit microcontroller is a high performance member of the MCS 96 microcontroller family
The 80C196KC is an enhanced 80C196KB device with 488 bytes RAM 16 and 20 MHz operation and an
optional 16 Kbytes of ROM OTPROM Intel’s CHMOS III process provides a high performance processor
along with low power consumption
The 87C196KC is an 80C196KC with 16 Kbytes on-chip OTPROM The 83C196KC is an 80C196KC with 16
Kbytes factory programmed ROM In this document the 80C196KC will refer to all products unless otherwise
stated
Four high-speed capture inputs are provided to record times when events occur Six high-speed outputs are
available for pulse or waveform generation The high-speed output can also generate four software timers or
start an A D conversion Events can be based on the timer or up down counter
With the commercial (standard) temperature option operational characteristics are guaranteed over the tem-
perature range of 0 C to a70 C With the extended (Express) temperature range option operational charac-
teristics are guaranteed over the temperature range of b40 C to a85 C Unless otherwise noted the specifi-
cations are the same for both options
See the Packaging information for extended temperature designators
Other brands and names are the property of their respective owners
Information in this document is provided in connection with Intel products Intel assumes no liability whatsoever including infringement of any patent or
copyright for sale and use of Intel products except as provided in Intel’s Terms and Conditions of Sale for such products Intel retains the right to make
changes to these specifications at any time without notice Microcomputer Products may have minor variations to this specification known as errata
COPYRIGHT INTEL CORPORATION 1995
November 1994
Order Number 270942-005






N83C196KC20 Datasheet, Funktion
8XC196KC 8XC196KC20
Figure 6 80-Pin SQFP Package
270942 – 44
6

6 Page









N83C196KC20 pdf, datenblatt
8XC196KC 8XC196KC20
AC CHARACTERISTICS (Continued)
For user over specified operating conditions
Test Conditions Capacitive load on all pins e 100 pF Rise and fall times e 10 ns FOSC e 16 MHz
The 80C196KC will meet these specifications
Symbol
Description
FXTAL
FXTAL
TOSC
TOSC
TXHCH
TCLCL
TCHCL
TCLLH
TLLCH
TLHLH
TLHLL
TAVLL
TLLAX
TLLRL
TRLCL
TRLRH
TRHLH
TRLAZ
TLLWL
TCLWL
TQVWH
TCHWH
TWLWH
TWHQX
TWHLH
TWHBX
TWHAX
TRHBX
TRHAX
Frequency on XTAL1 (8XC196KC)
Frequency on XTAL1 (8XC196KC20)
I FXTAL (8XC196KC)
I FXTAL (8XC196KC20)
XTAL1 High to CLKOUT High or Low
CLKOUT Cycle Time
CLKOUT High Period
CLKOUT Falling Edge to ALE Rising
ALE Falling Edge to CLKOUT Rising
ALE Cycle Time
ALE High Period
Address Setup to ALE Falling Edge
Address Hold after ALE Falling Edge
ALE Falling Edge to RD Falling Edge
RD Low to CLKOUT Falling Edge
RD Low Period
RD Rising Edge to ALE Rising Edge
RD Low to Address Float
ALE Falling Edge to WR Falling Edge
CLKOUT Low to WR Falling Edge
Data Stable to WR Rising Edge
CLKOUT High to WR Rising Edge
WR Low Period
Data Hold after WR Rising Edge
WR Rising Edge to ALE Rising Edge
BHE INST after WR Rising Edge
AD8–15 HOLD after WR Rising
BHE INST after RD Rising Edge
AD8–15 HOLD after RD Rising
Min Max
8 16
8 20
62 5 125
50 125
a20
a110
2 TOSC
TOSC b 10
TOSCa15
b5 a15
b20
a15
4 TOSC
TOSC b 10
TOSC b 15
TOSC b 35
TOSC b 30
a4
TOSCa10
a30
TOSC b 5
TOSC
TOSC a 25
a5
TOSC b 10
0
a25
TOSC b 23
b5
a15
TOSC b 20
TOSC b 25
TOSC b 10
TOSC b 10
TOSC b 30
TOSC b 10
TOSC b 25
TOSC a 15
Units
MHz
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Notes
(Note 1)
(Note 1)
(Note 4)
(Note 4)
(Note 2)
(Note 4)
(Note 4)
(Note 2)
(Note 3)
(Note 3)
NOTES
1 Testing performed at 8 MHz However the device is static by design and will typically operate below 1 Hz
2 Assuming back-to-back bus cycles
3 8-Bit bus only
4 If wait states are used add 2 TOSC N where N e number of wait states
12

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