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PDF SRDA05-6 Data sheet ( Hoja de datos )

Número de pieza SRDA05-6
Descripción RailClamp Low Capacitance TVS Diode Array
Fabricantes Semtechoration 
Logotipo Semtechoration Logotipo



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PROTECTION PRODUCTS
Description
RailClamps are surge rated diode arrays designed to
protect high speed data interfaces. The SR series has
been specifically designed to protect sensitive compo-
nents which are connected to data and transmission
lines from overvoltage caused by ESD (electrostatic
discharge), EFT (electrical fast transients), and light-
ning.
The unique design of the SRDA series devices incorpo-
rates surge rated, low capacitance steering diodes and
a TVS diode in a single package. During transient
conditions, the steering diodes direct the transient to
either the positive side of the power supply line or to
ground. The internal TVS diode prevents over-voltage
on the power line, protecting any downstream compo-
nents.
The low capacitance array configuration allows the user
to protect two high-speed data or transmission lines.
The low inductance construction minimizes voltage
overshoot during high current surges.
SRDA3.3-6 & SRDA05-6
RailClampÒ
Low Capacitance TVS Diode Array
Features
u Transient protection for high-speed data lines to
IEC 61000-4-2 (ESD) 15kV (air), 8kV (contact)
IEC 61000-4-4 (EFT) 40A (5/50ns)
IEC 61000-4-5 (Lightning) 24A (8/20µs)
u Array of surge rated diodes with internal TVS diode
u Protects six I/O lines & power supply line
u Low capacitance (<15pF) for high-speed interfaces
u Low operating & clamping voltages
u Solid-state technology
Mechanical Characteristics
u JEDEC SO-8 package
u UL 497B listed
u Molding compound flammability rating: UL 94V-0
u Marking : Part number, date code, logo
u Packaging : Tube or Tape and Reel per EIA 481
Applications
u USB Power & Data Line Protection
u T1/E1 secondary IC Side Protection
u Token Ring
u HDSL, IDSL secondary IC Side Protection
u Video Line Protection
u Microcontroller Input Protection
u Base stations
u I2C Bus Protection
Circuit Diagram
Revision 9/2000
Schematic & PIN Configuration
I/O 1 1
I/O 2 2
+VREF 3
I/O 3 4
8 GND
7 I/O 6
6 I/O 5
5 I/O 4
S0-8 (Top View)
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SRDA05-6 pdf
SRDA3.3-6 & SRDA05-6
PROTECTION PRODUCTS
Applications Information
Device Connection Options for Protection of Six High-
Speed Lines
The SRDA TVS is designed to protect four data lines
from transient overvoltages by clamping them to a
fixed reference. When the voltage on the protected
line exceeds the reference voltage (plus diode VF) the
steering diodes are forward biased, conducting the
transient current away from the sensitive circuitry.
Data lines are connected at pins 1, 2, 4, 5, 6 and 7.
The negative reference is connected at pin 8. These
pins should be connected directly to a ground plane on
the board for best results. The path length is kept as
short as possible to minimize parasitic inductance.
The positive reference is connected at pins 2 and 3.
The options for connecting the positive reference are
as follows:
1. To protect data lines and the power line, connect
pin 3 directly to the positive supply rail (VCC). In this
configuration the data lines are referenced to the
supply voltage. The internal TVS diode prevents
over-voltage on the supply rail.
2. The SRDA can be isolated from the power supply by
adding a series resistor between pin 3 and VCC. A
value of 10kW is recommended. The internal TVS
and steering diodes remain biased, providing the
advantage of lower capacitance.
3. In applications where no positive supply reference
is available, or complete supply isolation is desired,
the internal TVS may be used as the reference. In
this case, pin 3 is not connected. The steering
diodes will begin to conduct when the voltage on
the protected line exceeds the working voltage of
the TVS (plus one diode drop).
Data Line and Power Supply Protection Using Vcc as
reference
Data Line Protection with Bias and Power Supply
Isolation Resistor
Data Line Protection Using Internal TVS Diode as
Reference
ESD Protection With RailClamps
RailClamps are optimized for ESD protection using the
rail-to-rail topology. Along with good board layout,
these devices virtually eliminate the disadvantages of
using discrete components to implement this topology.
Consider the situation shown in Figure 1 where dis-
crete diodes or diode arrays are configured for rail-to-
rail protection on a high speed line. During positive
duration ESD events, the top diode will be forward
biased when the voltage on the protected line exceeds
the reference voltage plus the V drop of the diode.
For negative events, the bottom Fdiode will be biased
when the voltage exceeds the V of the diode. At first
F
ã 2000 Semtech Corp.
5
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