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PDF MMUN2114LT1 Data sheet ( Hoja de datos )
| Número de pieza | MMUN2114LT1 | |
| Descripción | PNP SILICON BIAS RESISTOR TRANSISTOR | |
| Fabricantes | ON | |
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MMUN2111LT1 Series
Preferred Devices
Bias Resistor Transistors
PNP Silicon Surface Mount Transistors
with Monolithic Bias Resistor Network
This new series of digital transistors is designed to replace a single
device and its external resistor bias network. The BRT (Bias Resistor
Transistor) contains a single transistor with a monolithic bias network
consisting of two resistors; a series base resistor and a base-emitter
resistor. The BRT eliminates these individual components by
integrating them into a single device. The use of a BRT can reduce
both system cost and board space. The device is housed in the SOT-23
package which is designed for low power surface mount applications.
Features
• Simplifies Circuit Design
• Reduces Board Space
• Reduces Component Count
• The SOT-23 package can be soldered using wave or reflow. The
modified gull-winged leads absorb thermal stress during soldering
eliminating the possibility of damage to the die.
• Available in 8 mm embossed tape and reel.
• Pb−Free Packages are Available
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MAXIMUM RATINGS (TA = 25°C unless otherwise noted)
Rating
Symbol
Value
Unit
Collector-Base Voltage
Collector-Emitter Voltage
Collector Current
THERMAL CHARACTERISTICS
VCBO
VCEO
IC
50 Vdc
50 Vdc
100 mAdc
Characteristic
Symbol
Max
Unit
Total Device Dissipation
TA = 25°C
Derate above 25°C
PD
246 (Note 1)
mW
400 (Note 2)
1.5 (Note 1) °C/W
2.0 (Note 2)
Thermal Resistance,
Junction-to-Ambient
RqJA
508 (Note 1)
311 (Note 2)
°C/W
Thermal Resistance,
Junction-to-Lead
RqJL
174 (Note 1)
208 (Note 2)
°C/W
Junction and Storage,
Temperature Range
TJ, Tstg
−55 to +150
°C
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits are
exceeded, device functional operation is not implied, damage may occur and
reliability may be affected.
1. FR−4 @ Minimum Pad
2. FR−4 @ 1.0 x 1.0 inch Pad
© Semiconductor Components Industries, LLC, 2005
August, 2005 − Rev. 5
1
http://onsemi.com
PIN 1
BASE
(INPUT)
R1
R2
PIN 3
COLLECTOR
(OUTPUT)
PIN 2
EMITTER
(GROUND)
MARKING
DIAGRAM
3
1
SOT−23
CASE 318
STYLE 6
A6x M G
G
21
A6x = Device Code
x = A − L (Refer to page 2)
M = Date Code*
G = Pb−Free Package
(Note: Microdot may be in either location)
*Date Code orientation may vary depending
upon manufacturing location.
ORDERING INFORMATION
Device
MMUN21xxLT1
Package
Shipping†
SOT−23 3000/Tape & Reel
MMUN21xxLT1G SOT−23 3000/Tape & Reel
(Pb−Free)
MMUN21xxLT3 SOT−23 10000/Tape & Reel
MMUN21xxLT3G SOT−23 10000/Tape & Reel
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
DEVICE MARKING INFORMATION
See specific marking information in the device marking table
on page 2 of this data sheet.
Preferred devices are recommended choices for future use
and best overall value.
Publication Order Number:
MMUN2111LT1/D
1 page  
10
IC/IB = 10
1
MMUN2111LT1 Series
TYPICAL ELECTRICAL CHARACTERISTICS
MMUN2112LT1
1000
TA = −25°C
25°C
75°C
100
VCE = 10 V
TA = 75°C
25°C
−25°C
0.1
0.01
0
4
3
2
1
0
0
20 40 60
IC, COLLECTOR CURRENT (mA)
Figure 7. VCE(sat) versus IC
10
80 1
10
IC, COLLECTOR CURRENT (mA)
Figure 8. DC Current Gain
100
f = 1 MHz
lE = 0 V
TA = 25°C
10 20 30 40
VR, REVERSE BIAS VOLTAGE (VOLTS)
Figure 9. Output Capacitance
50
100 75°C 25°C
TA = −25°C
10
1
0.1
0.01 VO = 5 V
0.001 0 1 2 3 4 5 6 7 8 9 10
Vin, INPUT VOLTAGE (VOLTS)
Figure 10. Output Current versus Input Voltage
100
VO = 0.2 V
TA = −25°C
10 25°C
75°C
1
0.1 0 10
20 30 40 50
IC, COLLECTOR CURRENT (mA)
Figure 11. Input Voltage versus Output Current
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