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8752BH Schematic ( PDF Datasheet ) - Intel Corporation

Teilenummer 8752BH
Beschreibung MCS51 8-BIT CONTROL-ORIENTED MICROCONTROLLERS
Hersteller Intel Corporation
Logo Intel Corporation Logo 




Gesamt 21 Seiten
8752BH Datasheet, Funktion
smu @
MCS@51
8-BIT CONTROL-ORIENTED MICROCONTROLLERS
Commercial/Express
8031AH18051AH18051AHP
8032N+18052N-I
8751W8751H-8
8751BW8752BI-I
s High Performance HMOS Process
s Boolean Processor
s Internal Timers/Event Counters
s Bit-Addressable RAM
s 2-Level interrupt Priority Structure
s 32 1/0 Lines (Four 8-Bit Ports)
s 64K External Program Memory Space
s Security Feature Protects EPROM Parts
Against Software Piracy
s Programmable Full Duplex Serial
Channel
s 111 Instructions (64 Single-Cycle)
s 64K External Data Memory Space
s Extended Temperature Range
(–40”C to +85”C)
The MCS@51 controllers are optimized for control applications. Byte-processing and numerical operations on
small data structures are facilitated by a variety of fast addressing modes for accessing the internal RAM. The
instruction set provides a convenient menu of 8-bit arithmetic instructions, including multiply and divide instruc-
tions. Extensive on-chip support is provided for one-bit variables as a separate data type, allowing direct bit
manipulation and testing in control and logic systems that require Boolean processing.
The 8751H is an EPROM version of the 8051AH. It has 4 Kbytes of electrically programmable ROM which can
be erased with ultraviolet light. His fully compatible with the 8051AH but incorporates one additional feature: a
Program Memory Security bit that can be used to protect the EPROM against unauthorized readout. The
8751 H-8 is identical to the 8751 H but only operates up to 8 MHz.
The 8051AHP is identical to the 8051AH with the exception of the Protection Feature. To incorporate this
Protection Feature, program verification has been disabled and external memory accesses have been limited
to 4K.
The 8052AH is an enhanced version of the 8051AH. It is backwards compatible with the 8051AH and is
fabricated with HMOS II technology. The 8052AH enhancements are listed in the table below. Also refer to this
table for the ROM, ROMless and-EPROM versions of each product.
Device
8031AH
8051AH
6051AHP
8751 H
8751 H-8
6751 BH
8032AH
6052AH
8752BH
Intsrnal Memory
Program
Data
none
4K X 8 ROM
4K X 6 ROM
4K X 8 EPROM
4K X 8 EPROM
4K X 8 EPROM
none
8K X 8 ROM
8K X 8 EPROM
128 X 8 RAM
128 X 8 RAM
128 X 8 RAM
128 X 8 RAM
128 X 6 RAM
128 X 8 RAM
256 X 6 RAM
256 X 8 RAM
256 X 8 RAM
Timera/
Event Counters
2 x 18-Bit
2 x 16-Bit
2 x 16-Bit
2 x 16-Bit
2 x 16-Bit
2 x 16-Bit
3 x 16-Bit
3 x 16-Bit
3 x 16-Bit
Interrupts
5
5
5
5
5
5
6
6
6
I Intel Corporationassumes no responsibilityfor the use of any circuit~ other than circuitryembodied in an Intel product.No other circuitpatent
licenses are implied.Informationcontained herein supersedes previouslypublishedspecificationson theaa davices from Intel.
O INTEL CORPORATION, 1994
October 1994
Order Numben 272318-002






8752BH Datasheet, Funktion
MCS@51 CONTROLLER
Table 1. EXPRESS Prefix Identification
Prefix
P
D
N
TD
TP
TN
LD
Package Type
Plastic
Cerdip
PLCC
Cerdip
Plastic
PLCC
Cerdip
Temperature Range
Commercial
Commercial
Commercial
Extended
Extended
Extended
Extended
LP Plastic
Extended
NOTE:
Contactdistributoror localsalesofficeto matchEXPRESSprefixwith properdevice.
Burn-In
No
No
No
No
No
No
Yes
Yes
DESIGN CONSIDERATIONS
If an 8751 BH or 8752BH is replacing an 8751 H in
a future design, the user should carefully com-
pare both data sheets for DC or AC Characteris-
tic differences. Note that the VIH and IIH specifi-
cations for the ~ pin differ significantly between
the devices.
Exposure to light when the EPROM device is in
operation may cause logic errors. For this reason,
it is suggested that an opaque label be placed
over the window when the die is exposed to am-
bient light.
q The 8051AHP cannot access external Program
or Data memory above 4K. This means that the
following instructions that use the Data Pointer
only read/write data at address locations below
OFFFH:
MOVX A,@DPTR
MOVX (6JDPTRA,
When the Data Pointer contains an address
above the 4K limit, those locations will not be ac-
cessed.
To access Data Memory above 4K, the
MOVX @Ri,A or MOVX A,@Ri instructions must
be used.
6

6 Page









8752BH pdf, datenblatt
M=” 51 CONTROLLER
SERIAL PORT TIMING—SHIFT
Test Conditions: Over ODeratina Conditions: Load Capacitance = 80 rJF
Symbol
Parameter
12 MHz Oscillator
Min Max
VariableOscillator
Min Max
Unite
TXLXL Serial Port Clock Cycle Time
1.0
12TCLCL
ps
TQVXH Output Data Setup to Clock Rising
Edge
700
1OTCLCL– 133
ns
TXHQX Output Data Hold after Clock
Rising Edge
50
2TCLCL–1 17
ns
TXHDX Input Data Hold after Clock Rising
Edge
o
0
ns
TXHDV Clock Rising Edge to Input Data
Valid
700
10TCLCL– 133 ns
;HI17REGISTERMODETIMINGWAVEFORMS
INSTRUCTION I O I 1 I 2 I 3 I 4 I 5 I 6 I 7 I 8 I
ALE n n n n n n n n n n n n n n n n n n I
CLOCK
I-TXLXL-7
OUTPUT OATA
,
INPUT DATA
~
WI-TXHQX I
o 1)(
1
2x
3x
4x
5x
6x
7/
+
SET TI
4
SET RI
272318-8
12

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