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PDF MM74HC00MTC Data sheet ( Hoja de datos )
| Número de pieza | MM74HC00MTC | |
| Descripción | Quad 2-Input NAND Gate | |
| Fabricantes | Fairchild | |
| Logotipo |  |
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September 1983
Revised February 1999
MM74HC00
Quad 2-Input NAND Gate
General Description
The MM74HC00 NAND gates utilize advanced silicon-gate
CMOS technology to achieve operating speeds similar to
LS-TTL gates with the low power consumption of standard
CMOS integrated circuits. All gates have buffered outputs.
All devices have high noise immunity and the ability to
drive 10 LS-TTL loads. The 74HC logic family is function-
ally as well as pin-out compatible with the standard 74LS
logic family. All inputs are protected from damage due to
static discharge by internal diode clamps to VCC and
ground.
Features
s Typical propagation delay: 8 ns
s Wide power supply range: 2–6V
s Low quiescent current: 20 µA maximum (74HC Series)
s Low input current: 1 µA maximum
s Fanout of 10 LS-TTL loads
Ordering Code:
Order Number Package Number
Package Description
MM74HC00M
M14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow
MM74HC00SJ
M14D
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
MM74HC00MTC
MTC14
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
MM74HC00N
N14A
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Logic Diagram
Pin Assignments for DIP, SOIC, SOP and TSSOP
Top View
© 1999 Fairchild Semiconductor Corporation DS005292.prf
www.fairchildsemi.com
1 page  
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package Number MTC14
5 www.fairchildsemi.com
5 Page | ||
| Páginas | Total 6 Páginas | |
| PDF Descargar | [ Datasheet MM74HC00MTC.PDF ] | |
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