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82562ET Schematic ( PDF Datasheet ) - Intel Corporation

Teilenummer 82562ET
Beschreibung 82562ET 10/100 Mbps Platform LAN Connect (PLC)
Hersteller Intel Corporation
Logo Intel Corporation Logo 




Gesamt 21 Seiten
82562ET Datasheet, Funktion
82562ET 10/100 Mbps Platform LAN
Connect (PLC)
Networking Silicon
Datasheet
Product Features
s IEEE 802.3 10BASE-T/100BASE-TX
compliant physical layer interface
s IEEE 802.3u Auto-Negotiation support
s Digital Adaptive Equalization control
s Link status interrupt capability
s XOR tree mode support
s 3-port LED support (speed, link and
activity)
s 10BASE-T auto-polarity correction
s LAN Connect Interface
s Diagnostic loopback mode
s 1:1 transmit transformer ratio support
s Low power (less than 300 mW in active
transmit mode)
s Reduced power in “unplugged mode” (less
than 50 mW)
s Automatic detection of “unplugged mode”
s 3.3 V device
s 48-pin Shrink Small Outline Package
Revision 1.3
March 2003






82562ET Datasheet, Funktion
82562ET — Networking Silicon
vi Datasheet

6 Page









82562ET pdf, datenblatt
82562ET — Networking Silicon
3.4
3.5
Clock Pins
Pin Name
X1
X2
Pin
Number
Type
46 I
47 O
Description
Crystal Input Clock. X1 and X2 can be driven by an external 25 MHz
crystal of 50 PPM or better. Otherwise, X1 is driven by an external metal-
oxide semiconductor (MOS) level 25 MHz oscillator when X2 is left
floating.
Crystal Output Clock. X1 and X2 can be driven by an external 25 MHz
crystal of 50 PPM or better.
Platform LAN Connect Interface Pins
Pin Name
LAN_CLK
LAN_
RSTSYNC
LAN_
TXD[2:0]
LAN_
RXD[2:0]
Pin
Number
Type
39 O
42 I
45, 44, I
43
37, 35, O
34
Description
LAN Connect Clock. The LAN Connect Clock is driven by the 82562ET
on two frequencies depending on operation speed. When the 82562ET is
in 100BASE-TX mode, LAN_CLK drives a 50 MHz clock. Otherwise,
LAN_CLK drives a 5 MHz clock for 10BASE-T. The LAN_CLK does not
stop during normal operation.
Reset/Synchronize. This is a multiplexed pin and is driven by the Media
Access Control (MAC) layer device. Its functions are:
• Reset. When this pin is asserted beyond one LAN Connect clock
period, the 82562ET uses this signal Reset. To ensure reset of the
82562ET, the Reset signal should remain active for at least 500
µseconds.
• Synchronize. When this pin is activated synchronously, for only one
LAN Connect clock period, it is used to synchronize the MAC and PHY
on LAN Connect word boundaries.
LAN Connect Transmit Data. The LAN Connect transmit pins are used
to transfer data from the MAC device to the 82562ET. These pins are
used to move transmitted data and real time control and management
data. They also transmit out of band control data from the MAC to the
PHY. The pins should be fully synchronous to LAN_CLK.
LAN Connect Receive Data. The LAN Connect receive pins are used to
transfer data from the 82562ET to the MAC device. These pins are used
to move received data and real time control and management data. They
also move out of band control data from the PHY to the MAC. These pins
are synchronous to LAN_CLK.
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