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PDF ML2652 Data sheet ( Hoja de datos )
| Número de pieza | ML2652 | |
| Descripción | 10Base-T Physical Interface Chip | |
| Fabricantes | Micro Linear | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de ML2652 (archivo pdf) en la parte inferior de esta página. Total 23 Páginas | ||
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July 2000
ML2652/ML2653
10Base-T Physical Interface Chip
GENERAL DESCRIPTION
The ML2652, 10BASE-T Physical Interface Chip, is a
complete physical interface for twisted pair and AUI
Ethernet applications. It combines a 10BASE-T MAU,
Manchester Encoder/Decoder, and Twisted Pair Interface
filters in one monolithic IC. A complete DTE interface for
twisted pair Ethernet can be implemented by combining
the ML2652, an Ethernet controller, and transformers.
The ML2652 can automatically select between an AUI and
twisted pair interface based on Link Pulses. Six LED
outputs provide complete status at the physical link. Link
pulse testing can be enabled or disabled through the
LTP LED Pin.
The unique transmitter design uses a waveform generator
and low pass filter to meet the 10BASE-T transmitter
requirements without the need for an external filter. The
differential current driven output reduces common mode
which in turn results in very low EMI and RFI noise.
The ML2652 and ML2653 (28 pin version) are implemented
in a low power double polysilicon CMOS technology. The
ML2653 does not include the AUI interface.
ML2652 BLOCK DIAGRAM
FEATURES
s Complete physical interface solution
s Conforms to IEEE 802.3i–1990 (10Base-T)
s On-chip transmit and receive filters
s Automatic AUI/Twisted Pair selection (ML2652 only)
s Power down mode
s Pin selectable controller interface-(CS0 – CS2)
Intel 82586, 82596
NSC DP8390
Seeq 8003, 8005
AMD 7990
s Automatic polarity correction
s Pin selectable receive squelch levels
s Status pins for: link detect, receive &
transmit activity, collision, jabber, AUI selection
s Single supply 5V ±5%
CS0 CS1 CS2 FD VCC VCC GND
GND
TxC
TxE DATA MANCHESTER
TxD ENCODER
ENABLE
COL
LPBK
RxC
RxE
RxD
CONTROLLER COLLISION
INTERFACE
DATA MANCHESTER
DECODER
ENABLE
CLK OSC
LEDS
JABDIS
JABBER
DETECT
LINK
PULSE
RTX
XMT
WAVEFORM
GEN & LPF
COLLISION
DETECT
RECEIVER
CURRENT
DRIVEN XMT
OUTPUT
DRIVER
RECEIVE
LPF
AUI
Tx+
Tx–
Rx+
Rx–
RSL
DO+
DO–
CI+
CI–
DI+
DI–
RPOL
AUISEL XMT CLS
RCV
LTP
JAB
AUI/TP
1
1 page  
ELECTRICAL CHARACTERISTICS (Continued)
Unless otherwise specified TA = 0°C to 70°C, VCC = 5V +5%. Note 2 & 3.
SYMBOL
PARAMETER
CONDITIONS
MIN
VIL Digital input low voltage All except CLK
CLK
VIH Digital input high voltage All except CLK
CLK
2.0
3.5
IIL
Digital input low current
VIN=GND TxD, TxE, AUI/TP
VIN=GND LPBK, CS2–0, LBDIS,JABDIS
VIN=GND RSL
–10
VIN=GND LTP, RPOL,
–15
VIN=GND CLK
IIH
Digital input high current
VIN=VCC TxD, TxE, AUI/TP
VIN=VCC LPBK, CS2–0, LBDIS, JABDIS 10
VIN=VCC RSL
VIN=VCC LTP, RPOL
VIN=VCC CLK
CIN Digital input capacitance
All except CLK
CLK
VOL
Digital output low voltage
IOL=–2mA TxC, COL,
RxC, RxD, RxE
IOL=–10mA XMT, RCV,
CLS, LTP, RPOL, JAB
VOH
Digital output high voltage
IOH=2mA TxC, COL,
RxC, RxD, RxE
IOL=10uA XMT, RCV, CLS,
LTP, RPOL, JAB
4.0
2.4
ICC VCC supply current
TX transmission
No transmission
Powerdown mode
TOV
Tx± differential
output voltage
RTX = 10K
2.2
THD
Tx± harmonic distortion
TxD=all ones
–27
TCM
Tx± common mode
output voltage
TCMR Tx± common mode rejection VCM=15vp, 10.1 MHz sine
TOVI
Tx± differential output
voltage during idle
TOIA Tx± output current accuracy RTX=10K
TRO
Tx± output resistance
TCO
Tx± output capacitance
ML2652/ML2653
TYP
–25
–250
25
5
10
MAX
.8
1.5
–5
–5
–50
–500
–300
1
50
1
1
250
UNITS
V
V
V
V
µA
µA
µA
µA
µA
µA
µA
µA
µA
µA
pF
pF
.4 V
.6 V
V
V
140 mA
105 mA
2 mA
2.5 2.8 Vp
dB
± 100
± 50
mVp
mVp
± 50
mVp
50 mA
1 Mohm
10 pF
5
5 Page 
TIMING DIAGRAMS (Continued)
ML2652/ML2653
TxC
TxE
TxD
Tx±
XMT
t1 t2
t3
t4 t5
t7
t6
B0 B1 B2 B3
t8
B0 B0 B1 B1 B2 B2 B3 B3
t11 t12
t13 t14
t15
t9
t10
40mV
Figure 3. Transmit Timing
Rx±
RxE
RxC(1)
RxC(2) Tx
10
t20
t31
Tx Tx
10
t21
Tx
RxD
RCV
t26
1 0 10 1 0
t29
t22
t28
t22
t23
Rx Rx Rx Rx Rx
t23
Rx Rx Rx Rx Rx
t24
t25
10 10
t27
NOTE:
1. RxC IS NOT CONTINUOUS DURING IDLE
2. RxC IS CONTINUOUS DURING IDLE
Figure 4. Receive Timing – Start of Frame
11
11 Page | ||
| Páginas | Total 23 Páginas | |
| PDF Descargar | [ Datasheet ML2652.PDF ] | |
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