|
|
PDF ML2264 Data sheet ( Hoja de datos )
| Número de pieza | ML2264 | |
| Descripción | 4-Channel High-Speed 8-Bit A/D Converter with T/H (S/H) | |
| Fabricantes | Micro Linear | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de ML2264 (archivo pdf) en la parte inferior de esta página. Total 17 Páginas | ||
|
No Preview Available !
May 1997
ML2264*
4-Channel High-Speed 8-Bit
A/D Converter with T/H (S/H)
GENERAL DESCRIPTION
The ML2264 is a high-speed, µP compatible, 4-channel
8-bit A/D converter with a conversion time of 680ns over
the operating temperature range and supply voltage
tolerance. The ML2264 operates from a single 5V supply
and has an analog input range from GND to VCC.
The ML2264 has two different pin selectable modes. The
T/H mode has an internal track and hold. The S/H mode
has a true internal sample and hold and can digitize 0 to
5V sinusoidal signals as high as 500kHz.
The ML2264 digital interface has been designed so that
the device appears as a memory location or I/O port to a
µP. Analog input channels are selected by the latched and
decoded multiplexer address inputs.
The ML2264 is an enhanced, pin compatible second
source for the industry standard AD7824. The ML2264
enhancements are faster conversion time, parameters
guaranteed over the supply tolerance and temperature
range, improved digital interface timing, superior power
supply rejection, and better latchup immunity on analog
inputs.
FEATURES
s Conversion time, WR-RD mode over temperature and
supply voltage tolerance
Track & Hold Mode ................................. 830ns max
Sample & Hold Mode .............................. 700ns max
s Total unadjusted error ..................... ±1/2 LSB or ±1 LSB
s Capable of digitizing a 5V, 250kHz sine wave
s 4-analog input channels
s No missing codes
s 0V to 5V analog input range with single 5V power
supply
s No zero or full scale adjust required
s Analog input protection ............................... 25mA min
s Operates ratiometrically or with up to 5V voltage
reference
s No external clock required
s Power-on reset circuitry
s Low power ....................................................... 100mW
s Narrow 24-pin DIP, SOIC, or SSOP
s Superior pin compatible replacement for AD7824
BLOCK DIAGRAM
PIN CONNECTIONS
A IN 1
A IN 2
A IN 3
A IN 4
VCC +VREF
–VREF GND
SH/TH
+VREF
–VREF
4-BIT
FLASH
A/D
(MSB)
4-CH
MUX
+VREF 4-BIT
SAMPLE
&
–VREF D/A
HOLD
+VREF
– 16
+Σ
4-BIT
FLASH
–VREF
16
A/D
(LSB)
DECODE
LOGIC,
LATCH
&
THREE
STATE
OUTPUT
BUFFER
ADDRESS
LATCH
DECODE
TIMING
&
CONTROL
24-Pin DIP
A IN 4
A IN 3
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
A IN 2
A IN 1
MODE
DB0
DB1
DB2
DB3
RD
INT
GND
1 24
2 23
3 22
4 21
5 20
6 19
7 18
8 17
9 16
10 15
11 14
12 13
TOP VIEW
VCC A IN 4
SH/THA IN 3
A0 A IN 2
A1 A IN 1
DB7 MODE
DB6 DB0
DB5 DB1
DB4 DB2
CS DB3
WR/RDYRD
+VREF INT
–VREF GND
A0 A1
INT CS WR/RDY RD SH/TH MODE
24-Pin SOIC
24-Pin SSOP
1 24
2 23
3 22
4 21
5 20
6 19
7 18
8 17
9 16
10 15
11 14
12 13
TOP VIEW
VCC
SH/TH
A0
A1
DB7
DB6
DB5
DB4
CS
WR/RDY
+VREF
–VREF
*This Part Is End Of Life As Of August 1, 2000
1
1 page  
ML2264
ELECTRICAL CHARACTERISTICS (Continued)
Unless otherwise specified, TA = TMIN to TMAX, VCC = +VREF = 5V ± 5%, and –VREF = GND, and timing measured at 1.4V,
CL = 100pF. (Note 1)
ML2264XCX
PARAMETER
NOTES
CONDITIONS
TYP
MIN (NOTE 3) MAX
UNITS
AC and Dynamic Performance (Note 9) (Continued)
tAH, Multiplexer Address
Hold Time
4 SH/TH = GND, Figure 1
(Track & Hold Operation)
60
ns
tAS, Multiplexer Address
Setup Time
4 SH/TH = VCC, Figure 2
(Sample & Hold Operation)
225
ns
tAH, Multiplexer Address
Hold Time
4 SH/TH = VCC, Figure 2
(Sample & Hold Operation)
60
ns
AC Performance Read Mode (Pin 5 = 0V), Figure 4
tRDY, CS to RDY Delay
tRDD, RD Low to RDY Delay
tCSS, CS to RD, WR Setup Time
tCSH, CS to RD, WR Hold Time
tCRD, Conversion Time —
RD Low to INT low
4
4, 9 Figure 3
4
4
4, 9
0 60 ns
1020
ns
0 ns
0 ns
1020
ns
tACC0, Data Access Time
RD to Data Valid
4
tCRD–10
tCRD+20
ns
tRDPW, RD Pulse Width
tINTH, RD to INT Delay
tDH, Data Hold Time —
RD Rising Edge to Data
High Impedance State
4
4, 9
5, 9 Figure 3
tCRD+30
0
0
ns
65 ns
50 ns
tP, Delay Time Between
Conversions — INT Low
to RD Low
4, 9 Sample & Hold Mode,
SH/TH = VCC
Track & Hold Mode,
SH/TH = GND
300
240
ns
ns
AC Performance Write-Read Mode (Pin 5 = 5V), Figures 5 and 6
tCSS, CS to RD, WR Setup Time
tCSH, CS to RD, WR Hold Time
tWR, WR Pulse Width
4
4
4 SH/TH = VCC
5 SH/TH = GND
0 ns
0 ns
190 50K ns
320 50K ns
tRD, Read Time — WR
High to RD Low Delay
4 tRD < tINTL
275 ns
tRI, RD to INT Delay
tACC1, Data Access Time
— RD Low to Data Valid
4, 9 tRD < tINTL
4 tRD < tINTL
0 235 ns
0 240 ns
tCWR-RD, Conversion Time
— WR Falling Edge to INT Low
4, 8, 9
5, 8, 9
tRD < tINTL, SH/TH = VCC
tRD < tINTL, SH/TH = GND
700 ns
830 ns
5
5 Page 
(a) S/H Mode
WR
ACQUISITION
OR SAMPLING
PERIOD. ALL
COMPARATORS
AUTOZEROED.
MSB
COMPARATORS
DECIDING.
LSB
COMPARATORS
DECIDING.
ML2264
(a) T/H Mode
CONVERSION
STARTS.
VIN SAMPLING
ENDS. HOLD
TIME STARTS.
MSB
COMPARATOR
RESULTS ARE
LATCHED.
RD BROUGHT LOW
LATCHES LSB
COMPARATOR
RESULTS AND
BRINGS INT LOW.
WR
ALL
COMPARATORS
AUTOZEROED.
ACQUISITION
PERIOD. MSB
COMPARATORS
ARE TRACKING
VIN. LSB
COMPARATORS
ARE SAMPLING
VIN.
LSB
COMPARATORS
DECIDING.
CONVERSION
STARTS.
VIN SAMPLING
ENDS. MSB
COMPARATOR
RESULTS ARE
LATCHED.
RD BROUGHT LOW
LATCHES LSB
COMPARATOR
RESULTS AND
BRINGS INT LOW.
Figure 9. Operating Sequence (WR-RD Mode)
1.4 REFERENCE
The +VREF and –VREF inputs are the reference voltages that
determine the full scale and zero input voltages,
respectively, for the A/D converter. Thus, +VREF defines
the analog input which produces a full scale output and
–VREF defines the analog input which produces an output
code of all zeroes. The transfer function for the A/D
converter is shown in Figure 10.
+VREF and –VREF can be set to any voltage between GND
and VCC. This means that the reference voltages can be
offset from GND and the difference between +VREF+ and
–VREF– can be made small to increase the resolution of the
conversion. Note that the total unadjusted error increases
when [+VREF – (–VREF)] decreases.
1.5 POWER SUPPLY AND REFERENCE DECOUPLING
A 0.1µF ceramic disc capacitor is recommended to bypass
VCC to GND, using as short a lead length as possible.
If REF+ and REF– inputs are driven by long lines, they
should be bypassed by 0.1µF ceramic disc capacitors at
the reference input pins.
OUTPUT
CODE
11111111
11111110
11111101
FULL SCALE
TRANSITION
00000011
00000010
00000001
00000000
0
FS
FS – 1LSB
AIN, INPUT VOLTAGE (IN TERMS OF LSB’S)
Figure 10. A/D Transfer Characteristic
11
11 Page | ||
| Páginas | Total 17 Páginas | |
| PDF Descargar | [ Datasheet ML2264.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| ML2261 | P Compatible High-Speed 8-Bit A/D Converter with T/H (S/H) | Micro Linear |
| ML2264 | 4-Channel High-Speed 8-Bit A/D Converter with T/H (S/H) | Micro Linear |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |