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PDF MK2042-01 Data sheet ( Hoja de datos )

Número de pieza MK2042-01
Descripción Communications Clock Monitor
Fabricantes Integrated Circuit Systems 
Logotipo Integrated Circuit Systems Logotipo



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No Preview Available ! MK2042-01 Hoja de datos, Descripción, Manual

I
C
R
O
ADVANCE
C LOC K
INFORMATION
Communications
MK2042-01
Clock Monitor
Description
The MK2042-01 is designed to switch between
two clock sources. The switching can be externally
controlled by an input pin or configured to switch
automatically if the primary input clock stops.
The part also provides clock detection by reporting
when the primary input clock has stopped.
The MK2042-01 is optimized for use with our
MK2049 family of Communication Clock
Synthesizers. When used together, the
MK2042-01 and MK2049 provide a complete
system for switching to an alternate source when
the primary clock is lost, or for maintaining a
stable frequency on the MK2049 output.
For switching between clock sources with no
output glitches or short pulses, use the ICS580 or
ICS581 multiplexers.
Features
• Packaged in 16 pin SOIC
• User controlled or automatic switching
• Clock detect feature
• Does not add jitter or phase noise to the clock
• Ideal for systems with backup or redundant clocks
• Selectable timeouts for clock loss detection
• Accepts input frequencies from 0 Hz to 160 MHz
• Works with all MK2049-xx to provide enhanced
operation
• 3.3 V or 5 V operation
Block Diagram
VDD GND
SELB
OE
INB
INA
REFIN
S2:S0
CENTER
3
Clock Loss
Detector
VDD
CLKOUT
NO_INA
HIGH
GND
LOW
MDS 2042-01
1
Revision 102600
Printed 11/15/00
Integrated Circuit Systems, Inc. • 525 Race Street • San Jose • CA • 95126 • (408)295-9800tel• www.icst.com

1 page




MK2042-01 pdf
I
C
R
O
ADVANCE
C LOC K
INFORMATION
Communications
MK2042-01
Clock Monitor
VDD
S0
S1
S2
INB
INA
GND
SELB
REFIN
OE
VDD
CLKOUT
NO_INA
HIGH
LOW
GND
CENTER
0.01µF
10 k
10 k
8 kHz clock
from network
FS1 FS0
X2 RES
X1 CAP2
VDD
GND
FCAP
CAP1
VDD
VDD
GND
GND
CLK ICLK
CLK/2
FS3
8K FS2
(Not all connections for
MK2049-34 are shown.)
In this configuration, the output
frequency of the MK2049-34
will be held at the nominal
value after missing 2 cycles of
the 8 kHz network clock.
Figure 1. Typical Application of MK2042-01 With MK2049-34
MDS 2042-01
5
Revision 102600
Printed 11/15/00
Integrated Circuit Systems, Inc. • 525 Race Street • San Jose • CA • 95126 • (408)295-9800tel• www.icst.com

5 Page










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