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Descripción POWER TRANSISTOR
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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
SCANSWITCH
NPN Bipolar Power Deflection Transistor
For High and Very High Resolution Monitors
The MJW16212 is a state–of–the–art SWITCHMODEbipolar power transistor. It
is specifically designed for use in horizontal deflection circuits for 20 mm diameter
neck, high and very high resolution, full page, monochrome monitors.
1500 Volt Collector–Emitter Breakdown Capability
Typical Dynamic Desaturation Specified (New Turn–Off Characteristic)
Application Specific State–of–the–Art Die Design
Fast Switching:
200 ns Inductive Fall Time (Typ)
2000 ns Inductive Storage Time (Typ)
Low Saturation Voltage:
0.15 Volts at 5.5 Amps Collector Current and 2.5 A Base Drive
Low Collector–Emitter Leakage Current — 250 µA Max at 1500 Volts — VCES
High Emitter–Base Breakdown Capability For High Voltage Off Drive Circuits —
8.0 Volts (Min)
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎMAXIMUM RATINGS
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎRating
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎCollector–Emitter Breakdown Voltage
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎCollector–Emitter Sustaining Voltage
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎEmitter–Base Voltage
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎRMS Isolation Voltage (2)
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ(for 1 sec, TA = 25_C,
Rel. Humidity < 30%)
Per Fig. 14
Per Fig. 15
Symbol
VCES
VCEO(sus)
VEBO
VISOL
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎCollector Current — Continuous
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎCollector Current — Pulsed (1)
IC
ICM
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎBase Current — Continuous
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎBase Current — Pulsed (1)
IB
IBM
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎMaximum Repetitive Emitter–Base
Avalanche Energy
W (BER)
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎTotal Power Dissipation @ TC = 25_C
Total Power Dissipation @ TC = 100_C
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎDerated above TC = 25_C
PD
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎOperating and Storage Temperature Range
TJ, Tstg
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎTHERMAL CHARACTERISTICS
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎCharacteristic
Symbol
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎThermal Resistance — Junction to Case
RθJC
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎLead Temperature for Soldering Purposes
TL
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ1/8from the case for 5 seconds
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎv(1) Pulse Test: Pulse Width = 5.0 ms, Duty Cycle 10%.
Value
1500
650
8.0
10
15
5.0
10
0.2
150
39
1.49
– 55 to 125
Max
0.67
275
Unit
Vdc
Vdc
Vdc
V
Adc
Adc
mJ
Watts
W/_C
_C
Unit
_C/W
_C
(2) Proper strike and creepage distance must be provided.
Preferred devices are Motorola recommended choices for future use and best overall value.
SCANSWITCH and SWITCHMODE are trademarks of Motorola Inc.
REV 2
©MMoototorroollaa, IBncip. 1o9la96r Power Transistor Device Data
Order this document
by MJW16212/D
MJF18002 (See MJE18002)
MJF18004 (See MJE18004)
MJF18006 (See MJE18006)
MJF18008 (See MJE18008)
MJW16212*
*Motorola Preferred Device
POWER TRANSISTOR
10 AMPERES
1500 VOLTS – VCES
50 AND 150 WATTS
CASE 340K–01
TO–247AE
3–1

1 page




MJW16212 pdf
MJW16212
DYNAMIC DESATURATIION
The SCANSWITCH series of bipolar power transistors are
specifically designed to meet the unique requirements of hor-
izontal deflection circuits in computer monitor applications.
Historically, deflection transistor design was focused on mini-
mizing collector current fall time. While fall time is a valid
figure of merit, a more important indicator of circuit perfor-
mance as scan rates are increased is a new characteristic,
“dynamic desaturation.” In order to assure a linear collector
current ramp, the output transistor must remain in hard satu-
ration during storage time and exhibit a rapid turn–off transi-
tion. A sluggish transition results in serious consequences.
As the saturation voltage of the output transistor increases,
the voltage across the yoke drops. Roll off in the collector
current ramp results in improper beam deflection and distor-
tion of the image at the right edge of the screen. Design
changes have been made in the structure of the SCANS-
WITCH series of devices which minimize the dynamic desa-
turation interval. Dynamic desaturation has been defined in
terms of the time required for the VCE to rise from 1.0 to
5.0 volts (Figures 9 and 10) and typical performance at opti-
mized drive conditions has been specified. Optimization of
device structure results in a linear collector current ramp, ex-
cellent turn–off switching performance, and significantly low-
er overall power dissipation.
+ 24 V
Table 2. High Resolution Deflection Application Simulator
C1 +
100 µF
U2
MC7812
VI
G
N
VO
D
+
C2
10 µF
Q2
MJ11016
(IB)
R1
1k
R5 (IC)
Q5
1 k MJ11016
R7 R8
2.7 k 9.1 k
R9
470
+ C3
R10 10 µF
47
6.2 V
C6 +
100 µF
LY
R2
R510
SYNC
R3
250
Q1
C4 C5
0.005
7
(DC) OSC
8%
0.1
6
VCC
OUT 1
R11
470
1W
U1
R6 GND MC1391P
1k 2
BS170
T1: Ferroxcube Pot Core #1811 P3C8
Primary/Sec. Turns Ratio = 18:6
Gapped for LP = 30 µH
Q3
MJE
15031
100 V
T1
R12
470
1W
D1
MUR110
LB = 1.5 µH
CY = 0.01 µF
LY = 13 µH
5
D2
MUR460
LB
R4
22
CY
VCE
Q4
DUT
IB1 = 1.3 A
DYNAMIC DESATURATION TIME
4 IS MEASURED FROM VCE = 1 V
TO VCE = 5 V
3
IB2 = 4.9 A
2
TIME (2 µs/DIV)
Figure 9. Deflection Simulator Circuit Base
Drive Waveform
1
tds
0
02
4 6 8 10
TIME (ns)
Figure 10. Definition of Dynamic
Desaturation Measurement
Motorola Bipolar Power Transistor Device Data
3–5

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