M74HCT373 Datasheet PDF - ST Microelectronics
| Part Number | M74HCT373 | |
| Description | OCTAL D-TYPE LATCH WITH 3 STATE OUTPUT HCT373 NON INVERTING - HCT533 INVERTING | |
| Manufacturers | ST Microelectronics | |
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M74HCT373
OCTAL D-TYPE LATCH
WITH 3 STATE OUTPUT NON INVERTING
s HIGH SPEED:
tPD = 19ns (TYP.) at VCC = 4.5V
s LOW POWER DISSIPATION:
ICC = 4µA(MAX.) at TA=25°C
s COMPATIBLE WITH TTL OUTPUTS :
)VIH = 2V (MIN.) VIL = 0.8V (MAX)
t(ss SYMMETRICAL OUTPUT IMPEDANCE:
|IOH| = IOL = 6mA (MIN)
ucs BALANCED PROPAGATION DELAYS:
dtPLH ≅ tPHL
ros PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 373
te PDESCRIPTION
leThe M74HCT373 is an high speed CMOS OCTAL
oLATCH WITH 3-STATE OUTPUTS fabricated
swith sub-micron silicon gate C2MOS technology.
bThis 8-BIT D-Type latches is controlled by a latch
Oenable input (LE) and output enable input (OE).
-While the LE input is held at a high level, the Q
t(s)outputs will follow the data input. When the LE is
taken low, the Q outputs will be latched at the logic
clevel of D input data.
uWhile the OE input is at low level, the eight outputs
dwill be in a normal logic state (high or low logic
DIP
SOP
TSSOP
ORDER CODES
PACKAGE
TUBE
T&R
DIP
SOP
TSSOP
M74HCT373B1R
M74HCT373M1R M74HCT373RM13TR
M74HCT373TTR
level) and when OE is in high level the outputs will
be in a high impedance state.
The 3-State output configuration and the wide
choice of outline make bus organized system
simple.
All inputs are equipped with protection circuits
against static discharge and transient excess
voltage.
Obsolete ProPIN CONNECTION AND IEC LOGIC SYMBOLS
August 2001
1/11
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M74HCT373
AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, Input tr = tf = 6ns)
Test Condition
Value
Symbol
Parameter
VCC CL
(V) (pF)
TA = 25°C
-40 to 85°C -55 to 125°C Unit
Min. Typ. Max. Min. Max. Min. Max.
tTLH tTHL Output Transition
Time
4.5 50
7 12 15 18 ns
tPLH tPHL Propagation Delay
Time
(LE - Q)
50
4.5
150
20 30 38 45
ns
24 37 46 56
tPLH tPHL Propagation Delay
50
19 30 38 45
Time
(D - Q)
4.5
150
ns
23 36 45 54
t(s)tPZL tPZH High Impedance
50
20 30 38 45 ns
Output Enable
cTime
4.5 150 RL = 1 KΩ
24 37
46
56
utPLZ tPHZ High Impedance
dOutput Disable
4.5 50 RL = 1 KΩ
20 30
38
45 ns
roTime
PtW(H) Minimum Pulse
Width (LE)
4.5 50
8 15 19 22 ns
tets Minimum Set-up
leTime
4.5 50
4 10 13 15 ns
oth Minimum Hold
sTime
4.5 50
5 5 8 ns
ObCAPACITIVE CHARACTERISTICS
t(s) -Test Condition
Value
ucSymbol
Parameter
VCC
(V)
TA = 25°C
-40 to 85°C -55 to 125°C Unit
Min. Typ. Max. Min. Max. Min. Max.
rodCIN Input Capacitance
5 10 10 10 pF
PCPD Power Dissipation
Capacitance (note
te1)
66
pF
le1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
oload. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC/8 (per Flip
ObsFlop) and the CPD when n pcs of Flip Flop operate, can be gained by the following equation: CPD(TOTAL) = 32 + 34 x n (pF)
5/11
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Part DetailsOn this page, you can learn information such as the schematic, equivalent, pinout, replacement, circuit, and manual for M74HCT373 electronic component. |
| Information | Total 11 Pages | |
| Link URL | [ Copy URL to Clipboard ] | |
| Download | [ M74HCT373.PDF Datasheet ] | |
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Featured Datasheets
| Part Number | Description | MFRS |
| M74HCT373 | The function is OCTAL D-TYPE LATCH WITH 3 STATE OUTPUT HCT373 NON INVERTING - HCT533 INVERTING. ST Microelectronics | |
| M74HCT374 | The function is OCTAL D-TYPE FLIP FLOP WITH 3 STATE OUTPUT HCT374 NON INVERTING - HCT534 INVERTING. ST Microelectronics | |
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