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PDF M74HCT273 Data sheet ( Hoja de datos )

Número de pieza M74HCT273
Descripción OCTAL D TYPE FLIP FLOP
Fabricantes ST Microelectronics　
Logotipo ST Microelectronics Logotipo



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No Preview Available ! M74HCT273 Hoja de datos, Descripción, Manual

M74HCT273
OCTAL D TYPE FLIP FLOP WITH CLEAR
s HIGH SPEED :
fMAX = 80 MHz (TYP.) at VCC = 4.5V
s LOW POWER DISSIPATION:
ICC =4µA(MAX.) at TA=25°C
s COMPATIBLE WITH TTL OUTPUTS :
t(s)VIH = 2V (MIN.) VIL = 0.8V (MAX)
s SYMMETRICAL OUTPUT IMPEDANCE:
c|IOH| = IOL = 4mA (MIN)
dus BALANCED PROPAGATION DELAYS:
rotPLH ≅ tPHL
Ps PIN AND FUNCTION COMPATIBLE WITH
te74 SERIES 273
leDESCRIPTION
soThe M74HCT273 is an high speed CMOS OCTAL
bD TYPE FLIP FLOP WITH CLEAR fabricated with
Osilicon gate C2MOS technology.
-Information signals applied to D inputs are
t(s)transferred to the Q outputs on the positive-going
edge of the clock pulse.
DIP
SOP
TSSOP
ORDER CODES
PACKAGE
TUBE
T&R
DIP
SOP
TSSOP
M74HCT273B1R
M74HCT273M1R M74HCT273RM13TR
M74HCT273TTR
When the CLEAR input is held low, the Q output
are in the low logic level independent of the other
inputs.
All inputs are equipped with protection circuits
against static discharge and transient excess
voltage.
Obsolete ProducPIN CONNECTION AND IEC LOGIC SYMBOLS
August 2001
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M74HCT273 pdf
TEST CIRCUIT
M74HCT273
roduct(s)CL = 50pF or equivalent (includes jig and probe capacitance)
RT = ZOUT of pulse generator (typically 50Ω)
PWAVEFORM 1: PROPAGATION DELAY TIME, MINIMUM PULSE WIDTH (CLOCK), SETUP AND
Obsolete Product(s) - ObsoleteHOLD TIME (nD TO CLOCK), CLOCK MAXIMUM FREQUENCY (f=1MHz; 50% duty cycle)
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