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M74HC173 Schematic ( PDF Datasheet ) - ST Microelectronics

Teilenummer M74HC173
Beschreibung QUAD D-TYPE REGISTER 3-STATE
Hersteller ST Microelectronics
Logo ST Microelectronics Logo 




Gesamt 12 Seiten
M74HC173 Datasheet, Funktion
M54HC173
M74HC173
QUAD D-TYPE REGISTER (3-STATE)
. HIGH SPEED
fMAX = 73 MHz (TYP.) at VCC = 5 V
. LOW POWER DISSIPATION
ICC = 4 µA (MAX.) at TA = 25 °C
. HIGH NOISE IMMUNITY
VNIH = VNIL = 28 % VCC (MIN.)
. OUTPUT DRIVE CAPABILITY
15 LSTTL LOADS
. SYMMETRICAL OUTPUT IMPEDANCE
|IOH| = IOL = 6 mA (MIN.)
. BALANCED PROPAGATION DELAYS
tPLH = tPHL
. WIDE OPERATING VOLTAGE RANGE
VCC (OPR) = 2 V to 6 V
. PIN AND FUNCTION COMPATIBLE WITH
54/74LS 173
B1R
(Plastic Package)
F1R
(Ceramic Package)
M 1R
(Micro Package)
C1R
(Chip Carrier)
ORDER CODES :
M 54HC 17 3F 1R
M 74H C1 73 M1 R
M 74HC 17 3B 1R
M 74H C1 73 C1 R
PIN CONNECTIONS (top view)
DESCRIPTION
The M54/74HC173 is a high speed CMOS QUAD D-
TYPE REGISTER (3-STATE) fabricated in silicon
gate C2MOS technology.
It has the same high speed performance of LSTTL
combined with true CMOS low power consumption.
This device is composed of a four-bit register includ-
ing D-type flip-flops and 3-state buffers. The four flip-
flops are controlled by a common clock input
(CLOCK) and a common reset input (CLEAR). Sig-
nals applied to the data inputs (D1-D4) are stored at
the respective flip-flops on the positive going transi-
tion of the clock input, only when both clock control
inputs (G1 and G2) are held low.
The reset feature is asynchronous and active high.
The stored data are provided on each output only
when both output control inputs (M and N) are held
low, otherwise the outputs go to the high-impedance
state.
All inputs are equipped with protection circuits
against static discharge and transient excess volt-
age.
October 1992
NC =
No Internal
Connection
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M74HC173 Datasheet, Funktion
M54/M74HC173
AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, Input tr = tf = 6 ns)
Symbol
Parameter
Test Conditions
VCC CL
(V) (pF)
TA = 25 oC
54HC and 74HC
Min. Typ. Max.
Value
-40 to 85 oC
74HC
Min. Max.
-55 to 125 oC
54HC
Min. Max.
Unit
tREM Minimum
Removal Time
2.0
4.5 50
555
5 5 5 ns
6.0 5 5 5
CIN Input Capacitance
5 10 10 10 pF
CPD (*) Power Dissipation
Capacitance
50
pF
(*) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load.
(Refer to Test Circuit). Average operting current can be obtained by the following equation. ICC(opr) = CPD VCC fIN + ICC/4 (per circuit)
SWITCHING CHARACTERISTICS TEST WAVEFORM
EACH FLIP-FLOP SHALL BE SET HIGH WHEN
SWITCH IS CONNECTED TO GND LINE AND
IT SHALL BE SET LOW WHEN SWITCH IS
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M74HC173 pdf, datenblatt
M54/M74HC173
Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsability for the
consequences of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No
license is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specifications mentioned
in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied.
SGS-THOMSON Microelectronics products are not authorized for use ascritical components in life support devices or systems without express
written approval of SGS-THOMSON Microelectonics.
© 1994 SGS-THOMSON Microelectronics - All Rights Reserved
SGS-THOMSON Microelectronics GROUP OF COMPANIES
Australia - Brazil - France - Germany - Hong Kong - Italy - Japan - Korea - Malaysia - Malta - Morocco - The Netherlands -
Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A
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