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M74ACT02MTR Schematic ( PDF Datasheet ) - ST Microelectronics

Teilenummer M74ACT02MTR
Beschreibung QUAD 2-INPUT NOR GATE
Hersteller ST Microelectronics
Logo ST Microelectronics Logo 




Gesamt 8 Seiten
M74ACT02MTR Datasheet, Funktion
® 74ACT02
QUAD 2-INPUT NOR GATE
s HIGH SPEED: tPD = 5 ns (TYP.) at VCC = 5V
s LOW POWER DISSIPATION:
ICC = 4 µA (MAX.) at TA = 25 oC
s COMPATIBLE WITH TTL OUTPUTS
VIH = 2V (MIN), VIL = 0.8V (MAX)
s 50TRANSMISSION LINE DRIVING
CAPABILITY
s SYMMETRICAL OUTPUT IMPEDANCE:
|IOH| = IOL = 24 mA (MIN)
s BALANCED PROPAGATION DELAYS:
tPLH tPHL
s OPERATING VOLTAGE RANGE:
VCC (OPR) = 4.5V to 5.5V
s PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 02
s IMPROVED LATCH-UP IMMUNITY
DESCRIPTION
The ACT02 is an advanced high-speed CMOS
QUAD 2-INPUT NOR GATE fabricated with
sub-micron silicon gate and double-layer metal
wiring C2MOS technology. It is ideal for low
power applications mantaining high speed
operation similar to equivalent Bipolar Schottky
TTL.
DIP
SOP
TSSOP
PACKAGE
DIP
SOP
TSSOP
ORDER CODES
T UB E
T&R
M74ACT02B
M74ACT02M M74ACT02MTR
M74ACT02TTR
The internal circuit is composed of 3 stages
including buffer output, which enables high noise
immunity and stable output.
The device is designed to interface directly High
Speed CMOS systems with TTL, NMOS and
CMOS output voltage levels.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
PIN CONNECTION AND IEC LOGIC SYMBOLS
May 2000
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M74ACT02MTR Datasheet, Funktion
74ACT02
DIM.
A
a1
a2
b
b1
C
c1
D
E
e
e3
F
G
L
M
S
MIN.
0.1
0.35
0.19
8.55
5.8
3.8
4.6
0.5
SO-14 MECHANICAL DATA
mm
TYP.
0.5
1.27
7.62
MAX.
1.75
0.2
1.65
0.46
0.25
MIN.
0.003
0.013
0.007
45 (typ.)
8.75 0.336
6.2 0.228
4.0 0.149
5.3 0.181
1.27 0.019
0.68
8 (max.)
inch
TYP.
0.019
0.050
0.300
MAX.
0.068
0.007
0.064
0.018
0.010
0.344
0.244
0.157
0.208
0.050
0.026
P013G
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