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PDF M7010R Data sheet ( Hoja de datos )
| Número de pieza | M7010R | |
| Descripción | 16K x 68-bit Entry NETWORK SEARCH ENGINE | |
| Fabricantes | ST Microelectronics | |
| Logotipo |  |
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M7010R
16K x 68-bit Entry NETWORK SEARCH ENGINE
FEATURES SUMMARY
s 16K ENTRIES IN 68-BIT MODE
s TABLE MAY BE PARTITIONED INTO UP TO
FOUR (4) QUADRANTS
(Data entry width in each quadrant is config-
urable as 34, 68, 136, or 272 bits.)
s UP TO 83 MILLION SUSTAINED SEARCHES
PER SECOND IN 68-BIT and 136-BIT
CONFIGURATIONS
s UP TO 41.5 MILLION SEARCHES PER
SECOND IN 34-BIT and 272-BIT
CONFIGURATIONS
s SEARCHES ANY SUB-FIELD IN A SINGLE
CYCLE
s OFFERS BIT-BY-BIT and GLOBAL MASKING
s SYNCHRONOUS, PIPELINED OPERATION
s UP TO 31 SEARCH ENGINES CASCADABLE
WITHOUT PERFORMANCE DEGRADATION
s WHEN CASCADED, THE DATABASE
ENTRIES CAN SCALE FROM 124K to 992K
DEPENDING ON THE SIZE OF THE ENTRY
s GLUELESS INTERFACE TO INDUSTRY-
STANDARD SRAMS
s SIMPLE HARDWARE INSTRUCTION
INTERFACE
s IEEE 1149.1 TEST ACCESS PORT
s OPERATING SUPPLY VOLTAGES INCLUDE:
VDD (Operating Supply Voltage) = 1.8V
VDDQ (Operating Supply Voltage for I/O) = 2.5
or 3.3V
s 272 BALL, 27mm x 27mm, CAVITY-UP BGA
Figure 1. 272-ball PBGA Package
272 PBGA
27mm x 27mm
1.27mm ball pitch
July 2002
1/67
1 page  
M7010R
DEPTH-CASCADING . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
Depth-Cascading Up to Eight Devices (One Block) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
Depth-Cascading Up to 31 Devices (4 Blocks) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
Depth-Cascading to Generate a “FULL” State for a Block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
Depth-Cascading to Form a Single Block (8 Devices) (Figure 38.) . . . . . . . . . . . . . . . . . . . . . . . . . 53
Four Blocks (31 Devices Cascaded) SEARCH, 68-bit Configured with LDEV = 1 (Figure 39.) . . . 54
“FULL” State Generation in a Cascaded Table (Figure 40.) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
ARBITRATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
Timing Diagram for Arbitration Within a Block (Figure 41.) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
Timing for Arbitration for Two or More Blocks for the Last Device (Figure 42.). . . . . . . . . . . . . . . . 57
SRAM ADDRESSING . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
SRAM PIO Access . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
SRAM READ Access for One M7010R Device (Figure 43.) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
SRAM WRITE Access for One M7010R Device (Figure 44.) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
SRAM Bus Address Generation (Table 35.) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
Right-Shift of SRAM Signals for TLSZ Values (Table 36.) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
Right-Shift of SRAM Signals for HLAT Values (Table 37.) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
JTAG (1149.1) TESTING . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
Test Access Port Controller Instructions (Table 38.) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
TAP Device ID Register (Table 39.) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
POWER DISTRIBUTION GUIDELINE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
Network Search Engine Power Distribution (Figure 45.) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
PART NUMBERING . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
PACKAGE MECHANICAL INFORMATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
REVISION HISTORY. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
5/67
5 Page 
M7010R
DC AND AC PARAMETERS
This section summarizes the operating and mea-
surement conditions, as well as the DC and AC
characteristics of the device. The parameters in
the following DC and AC Characteristic tables are
derived from tests performed under the Measure-
ment Conditions listed in the relevant tables. De-
signers should check that the operating conditions
in their projects match the measurement condi-
tions when using the quoted parameters.
Table 4. DC and AC Measurement Conditions
Sym
Parameter
M7010R 2.5V
VDD VDD Operating Supply Voltage
1.7 to 1.9
VDDQ VDDQ Voltage for I/O
2.4 to 2.6
tA Ambient Operating Temperature
0 to 70
CL Load Capacitance
6
VIH Input High Voltage(1)
1.7 to
VDDQ + 0.3
VIL Input Low Voltage(2)
–0.3 to 0.7
Supply Voltage Tolerance
±5
tR, tF
Input Rise and Fall Times
(at 0.3V and 2.7V)
≤ 2 (see Figure 6, page 12)
Input Timing Reference Levels
1.25
Output Timing Reference Levels
1.25
Input Pulse Voltages
GND to 2.5
Input and Output Timing Ref. Voltages
(see Figure 7, page 12)
Note: 1. Maximum allowable applies to overshoot only (VDDQ is 3.3V supply).
2. Minimum allowable applies to undershoot only.
M7010R 3.3V
1.7 to 1.9
3.1 to 3.5
0 to 70
6
2.0 to
VDDQ + 0.3
–0.3 to 0.8
±5
Units
V
V
°C
pF
V
V
%
≤ 2 (see Figure 9, page 12) ns
1.5
1.5
GND to 3.3
(see Figure 10, page 12)
V
V
V
V
11/67
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet M7010R.PDF ] | |
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