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M30610EC Schematic ( PDF Datasheet ) - Mitsubishi

Teilenummer M30610EC
Beschreibung SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Hersteller Mitsubishi
Logo Mitsubishi Logo 




Gesamt 30 Seiten
M30610EC Datasheet, Funktion
Description
Mitsubishi microcomputers
M16C / 61 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Description
The M16C/61 group of single-chip microcomputers are built using the high-performance silicon gate
CMOS process using a M16C/60 Series CPU core and are packaged in a 100-pin plastic molded QFP.
These single-chip microcomputers operate using sophisticated instructions featuring a high level of in-
struction efficiency. With 1M bytes of address space, they are capable of executing instructions at high
speed. They also feature a built-in multiplier and DMAC, making them ideal for controlling office, communi-
cations, industrial equipment, and other high-speed processing applications.
The M16C/61 group includes a wide range of products with different internal memory types and sizes and
various package types.
Features
• Memory capacity ............................................ ROM (See Figure 1.1.4. ROM Expansion)
RAM 4K to 10K bytes
• Shortest instruction execution time ................ 100ns (f(XIN)=10MHZ)
• Supply voltage ............................................... 4.0 to 5.5V (f(XIN)=10MHZ)
2.7 to 5.5V (f(XIN)=7MHZ with software one-wait)
• Low power consumption ................................ 18mW ( f(XIN)=7MHZ, with software one-wait, VCC = 3V)
• Interrupts ........................................................ 20 internal and 5 external interrupt sources, 4 software
interrupt sources; 7 levels (including key input interrupt)
• Multifunction 16-bit timer ................................ 5 output timers + 3 input timers
• Serial I/O (UART or clock synchronous) ........ 3 channels
• DMAC ............................................................ 2 channels (trigger: 16 sources)
• A-D converter ................................................. 10 bits X 8 channels
(Expandable up to 10 channels)
• D-A converter ................................................. 8 bits X 2 channels
• CRC calculation circuit ................................... 1 circuit
• Watchdog timer .............................................. 1 line
• Programmable I/O ......................................... 87 lines
_______
• Input port ........................................................ 1 line (P85 shared with NMI pin)
• Memory expansion ........................................ Available (to a maximum of 1M bytes)
• Chip select output .......................................... 4 lines
• Clock generating circuit ................................. 2 built-in clock generation circuits
(built-in feedback resistor, and external ceramic or quartz oscillator)
Applications
Audio, cameras, office equipment, communications equipment, portable equipment
------Table of Contents------
Central Processing Unit (CPU) ..................... 11
Reset ............................................................. 14
Processor Mode ............................................ 19
Clock Generating Circuit ............................... 30
Protection ...................................................... 39
Interrupts ....................................................... 40
Watchdog Timer ............................................ 59
DMAC ........................................................... 61
Timer ............................................................. 70
Serial I/O ....................................................... 87
A-D Converter ............................................. 114
D-A Converter ............................................. 124
CRC Calculation Circuit .............................. 126
Programmable I/O Ports ............................. 128
Electrical Characteristics ............................. 142
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M30610EC Datasheet, Funktion
Description
Mitsubishi microcomputers
M16C / 61 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Mitsubishi plans to release the following products in the M16C/61 group:
(1) Support for mask ROM version, external ROM version, one-time PROM version, and EPROM version
(2) ROM capacity
(3) Package
100P6S-A : Plastic molded QFP (mask ROM version and one-time PROM version)
100P6Q-A : Plastic molded QFP (mask ROM version and one-time PROM version)
100D0
: Ceramic LCC (EPROM version)
ROM
Size(Byte)
External
ROM
128 K
M30610MCA-XXXFP/GP
M30612MCA-XXXFP/GP
96 K
M30610MAA-XXXFP/GP
M30612MAA-XXXFP/GP
64 K
M30610M8A-XXXFP/GP
M30612M8A-XXXFP/GP
32 K
M30612M4A-XXXFP/GP
Mask ROM version
M30610ECFP/GP
M30612E4FP/GP
One-time PROM version
M30610ECFS
EPROM version
M30612SAFP/GP
M30610SAFP/GP
External ROM version
Figure 1.1.4. ROM expansion
The M16C/61 group products currently supported are listed in Table 2.
Table 1.1.2. M16C/61 group
Apr. 1999
Type No
ROM capacity RAM capacity Package type
Remarks
M30612M4A-XXXFP
M30612M4A-XXXGP
32K byte
4K byte
100P6S-A
100P6Q-A
M30610M8A-XXXFP
M30610M8A-XXXGP
M30612M8A-XXXFP
M30612M8A-XXXGP
64K byte
10K byte
4K byte
100P6S-A
100P6Q-A
100P6S-A
100P6Q-A
M30610MAA-XXXFP
M30610MAA-XXXGP
M30612MAA-XXXFP
M30612MAA-XXXGP
96K byte
10K byte
4K byte
100P6S-A
100P6Q-A
100P6S-A
100P6Q-A
Mask ROM version
M30610MCA-XXXFP
M30610MCA-XXXGP
M30612MCA-XXXFP
M30612MCA-XXXGP
128K byte
10K byte
5K byte
100P6S-A
100P6Q-A
100P6S-A
100P6Q-A
M30612E4FP
M30612E4GP
M30610ECFP
M30610ECGP
M30610ECFS
32K byte
128K byte
128K byte
4K byte
10K byte
10K byte
100P6S-A
100P6Q-A
100P6S-A
100P6Q-A
100D0
One-time PROM version
EPROM version (Note)
M30610SAFP
M30610SAGP
M30612SAFP
M30612SAGP
10K byte
4K byte
100P6S-A
100P6Q-A
100P6S-A
100P6Q-A
External ROM version
Note: Do not use the EPROM version for mass production, because it is a tool for program development
(for evaluation).
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M30610EC pdf, datenblatt
CPU
Mitsubishi microcomputers
M16C / 61 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
(3) Frame base register (FB)
Frame base register (FB) is configured with 16 bits, and is used for FB relative addressing.
(4) Program counter (PC)
Program counter (PC) is configured with 20 bits, indicating the address of an instruction to be executed.
(5) Interrupt table register (INTB)
Interrupt table register (INTB) is configured with 20 bits, indicating the start address of an interrupt vector
table.
(6) Stack pointer (USP/ISP)
Stack pointer comes in two types: user stack pointer (USP) and interrupt stack pointer (ISP), each config-
ured with 16 bits.
Your desired type of stack pointer (USP or ISP) can be selected by a stack pointer select flag (U flag).
This flag is located at the position of bit 7 in the flag register (FLG).
(7) Static base register (SB)
Static base register (SB) is configured with 16 bits, and is used for SB relative addressing.
(8) Flag register (FLG)
Flag register (FLG) is configured with 11 bits, each bit is used as a flag. Figure 1.5.2 shows the flag
register (FLG). The following explains the function of each flag:
• Bit 0: Carry flag (C flag)
This flag retains a carry, borrow, or shift-out bit that has occurred in the arithmetic/logic unit.
• Bit 1: Debug flag (D flag)
This flag enables a single-step interrupt.
When this flag is “1”, a single-step interrupt is generated after instruction execution. This flag is
cleared to “0” when the interrupt is acknowledged.
• Bit 2: Zero flag (Z flag)
This flag is set to “1” when an arithmetic operation resulted in 0; otherwise, cleared to “0”.
• Bit 3: Sign flag (S flag)
This flag is set to “1” when an arithmetic operation resulted in a negative value; otherwise, cleared to “0”.
• Bit 4: Register bank select flag (B flag)
This flag chooses a register bank. Register bank 0 is selected when this flag is “0” ; register bank 1 is
selected when this flag is “1”.
• Bit 5: Overflow flag (O flag)
This flag is set to “1” when an arithmetic operation resulted in overflow; otherwise, cleared to “0”.
• Bit 6: Interrupt enable flag (I flag)
This flag enables a maskable interrupt.
An interrupt is disabled when this flag is “0”, and is enabled when this flag is “1”. This flag is cleared to
“0” when the interrupt is acknowledged.
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