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PDF MAX9693 Data sheet ( Hoja de datos )
| Número de pieza | MAX9693 | |
| Descripción | Single/Dual / Ultra-Fast / ECL-Output Comparators with Latch Enable | |
| Fabricantes | Maxim Integrated | |
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19-1789; Rev 1; 10/02
Single/Dual, Ultra-Fast, ECL-Output
Comparators with Latch Enable
General Description
The MAX9691/MAX9692/MAX9693 are ultra-fast ECL
comparators capable of very short propagation delays.
Their design maintains the excellent DC matching char-
acteristics normally found only in slower comparators.
The MAX9691/MAX9692/MAX9693 have differential
inputs and complementary outputs that are fully com-
patible with ECL-logic levels. Output current levels are
capable of driving 50Ω terminated transmission lines.
The ultra-fast operation makes signal processing possi-
ble at frequencies in excess of 600MHz.
The MAX9692/MAX9693 feature a latch-enable (LE)
function that allows the comparator to be used in a
sample-hold mode. When LE is ECL high, the compara-
tor functions normally. When LE is driven ECL low, the
outputs are forced to an unambiguous ECL-logic state,
dependent on the input conditions at the time of the
latch input transition. If the latch-enable function is not
used on either of the two comparators, the appropriate
LE input must be connected to ground; the companion
LE input must be connected to a high ECL logic level.
These devices are available in SO, QSOP, and tiny
µMAX packages for added space savings.
________________________Applications
High-Speed Line Receivers
Peak Detectors
Threshold Detectors
High-Speed Triggers
Features
o 1.2ns Propagation Delay
o 100ps Propagation Delay Skew
o 150ps Dispersion
o 0.5ns Latch Setup Time
o 0.5ns Latch-Enable Pulse Width
o Available in µMAX and QSOP Packages
o +5V, -5.2V Power Supplies
Ordering Information
PART
TEMP
RANGE
PIN-PACKAGE
MAX9691EUA
MAX9691ESA
-40°C to +85°C
-40°C to +85°C
8 µMAX
8 SO
MAX9691EPA
-40°C to +85°C 8 PDIP
Ordering Information continued at the end of data sheet.
Selector Guide
PART
MAX9691
COMPARATORS LATCH PIN-
PER PACKAGE ENABLE PACKAGE
1 No 8 µMAX,
8 SO, 8 PDIP
MAX9692
MAX9693
1
2
Yes 10 µMAX,
16 SO, 16 PDIP
16 QSOP,
Yes 16 SO, 16 PDIP
Pin Configurations appear at end of data sheet.
_________________________________________________________Functional Diagrams
IN+
IN-
MAX9691
RL
Q OUT
Q OUT
NONINVERTING
INPUT
INVERTING
INPUT
Q OUT
Q OUT
RL
VT
MAX9693
RL
LE LE
LATCH ENABLE
RL RL
VT
THE OUTPUTS ARE OPEN EMITTERS, REQUIRING EXTERNAL PULLDOWN
RESISTORS. THESE RESISTORS MAY BE IN THE RANGE OF 50Ω TO 200Ω
CONNECTED TO -2.0V, OR 240Ω TO 2000Ω CONNECTED TO -5.2V.
NONINVERTING
INPUT
INVERTING
INPUT
RL
MAX9693
LE LE
LATCH ENABLE
________________________________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
1 page  
Single/Dual, Ultra-Fast, ECL-Output
Comparators with Latch Enable
Typical Operating Characteristics (continued)
(VCC = +5V, VEE = -5.2V, RL = 50Ω to VT, VT = -2V, VOD = 10mV, TA = +25°C, unless otherwise noted.)
VIN
200mV/div
PROPAGATION DELAY
MAX9691/3-11
VIN = 100mV
VOD = 10mV
Q OUT - Q OUT
200mV/div
1ns/div
Q OUT
200mV/div
Q OUT
200mV/div
100MHz OUTPUT RESPONSE
MAX9691/3-12
-1.0V
-1.8V
-1.0V
1ns/div
-1.8V
__________ Applications Information
Layout
Because of the MAX9691/MAX9692/MAX9693s’ large
gain-bandwidth characteristic, special precautions
must be taken to use them. A PC board with a ground
plane is mandatory. Mount 0.01µF ceramic decoupling
capacitors as close to the power-supply pins as possi-
ble, and process the ECL outputs in microstrip fashion,
consistent with the load termination of 50Ω to 200Ω (for
VT = -2V). For low-impedance applications, microstrip
layout and terminations at the input may also be help-
ful. Pay close attention to the bandwidth of the decou-
pling and terminating components. Chip components
can be used to minimize lead inductance. Connect
GND1 and GND2 together to a solid copper ground
VIN
50Ω
50Ω
Q
Q
LE
Rf Cf
50Ω
50Ω
-2V
Figure 1. Regenerative Feedback—High-Speed Receiver with
50Ω Input and Output Termination
plane for the MAX9691/MAX9692. GND1 biases the
input gain stages, while GND2 biases the ECL output
stage. If the LE function is not used, connect the LE pin
to GND (MAX9692/MAX9693) and the complementary
LE to ECL logic high level (MAX9693 only). Do not
leave the inputs of an unused comparator floating for
the MAX9693.
Input Slew-Rate Requirements
As with all high-speed comparators, the high gain-
bandwidth product of these devices creates oscillation
problems when the input goes through the linear
region. For clean switching without oscillation or steps
in the output waveform, the input must meet certain
minimum slew-rate requirements. The tendency of the
part to oscillate is a function of the layout and source
impedance of the circuit employed. Poor layout and
larger source impedance will increase the minimum
slew-rate requirement.
Figure 1 shows a high-speed receiver application with
50Ω input and output termination. With this configura-
tion, in which a ground plane and microstrip PC board
are used, the minimum slew rate for clean output
switching is 1V/µs.
In many applications, adding regenerative feedback
will assist the input signal through the linear region,
which will lower the minimum slew-rate requirement
considerably. For example, with the addition of positive
feedback components, Rf = 1kΩ and Cf = 10pF, the
minimum slew-rate requirement can be reduced by a
factor of four.
_______________________________________________________________________________________ 5
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| Páginas | Total 10 Páginas | |
| PDF Descargar | [ Datasheet MAX9693.PDF ] | |
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