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PDF MAX9156 Data sheet ( Hoja de datos )
| Número de pieza | MAX9156 | |
| Descripción | Low-Jitter / Low-Noise LVPECL-to-LVDS Level Translator in an SC70 Package | |
| Fabricantes | Maxim Integrated | |
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19-2216; Rev 0; 10/01
Low-Jitter, Low-Noise LVPECL-to-LVDS Level
Translator in an SC70 Package
General Description
The MAX9156 is an LVPECL-to-LVDS level translator
that accepts a single LVPECL input and translates it to
a single LVDS output. It is ideal for interfacing between
LVPECL and LVDS interfaces in systems that require
minimum jitter, noise, power, and space.
Ultra-low, 23psp-p added deterministic jitter and
0.6psRMS added random jitter ensure reliable commu-
nication in high-speed links that are highly sensitive to
timing errors, especially those incorporating clock-and-
data recovery, PLLs, serializers, or deserializers. The
MAX9156’s switching performance guarantees a
200Mbps data rate, but minimizes radiated noise by
guaranteeing 0.5ns minimum output transition time.
The MAX9156 operates from a single +3.3V supply and
consumes only 10mA supply current over a -40°C to
+85°C temperature range. It is available in a tiny 6-pin
SC70 package (half the size of a SOT23). Refer to the
MAX9155 data sheet for a low-jitter, low-noise LVDS
repeater in an SC70 package.
Features
o Tiny SC70 Package
o Ultra-Low Jitter
23psp-p Added Deterministic Jitter
(223-1 PRBS)
0.6psRMS Added Random Jitter
o 0.5ns (min) Transition Time Minimizes Radiated
Noise
o 200Mbps Guaranteed Data Rate
o Low 10mA Supply Current
o Output Conforms to ANSI/EIA/TIA-644 LVDS
Standard
o High-Impedance Inputs and Outputs in
Power-Down Mode
Applications
Digital Cross-Connects
Add/Drop Muxes
Network Switches/Routers
Cellular Phone Base Stations
DSLAMs
Multidrop Buses
Typical Operating Circuit
3.3V
LVPECL
DRIVER
IN+
IN-
VCC
MAX9156
OUT+
LVDS
OUT- SIGNALS
GND
PART
MAX9156EXT-T
Ordering Information
TEMP. RANGE
-40°C to +85°C
PIN-
PACKAGE
6 SC70-6
TOP
MARK
ABD
TOP VIEW
Pin Configuration
OUT- 1
MAX9156
6 OUT+
GND 2
5 VCC
IN- 3
SC70
4 IN+
________________________________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
1 page  
Low-Jitter, Low-Noise LVPECL-to-LVDS Level
Translator in an SC70 Package
Typical Operating Characteristics (continued)
(VCC = +3.3V, RL = 100Ω ±1%, CL = 10pF, |VID| = 0.2V, VCM = 1.2V, TA = +25°C, unless otherwise noted. Signal generator output:
frequency = 100MHz, 50% duty cycle, RO = 50Ω, tR = 1.5ns, and tF = 1.5ns (0% to 100%), unless otherwise noted.)
800
750
700
650
600
550
500
450
400
-40
TRANSITION TIME
VS. TEMPERATURE
tTLH, tTHL
-15 10 35 60
TEMPERATURE (°C)
85
DIFFERENTIAL OUTPUT VOLTAGE
VS. LOAD RESISTOR
600
500
400
300
200
100
0
25 50 75 100 125 150
LOAD RESISTOR (Ω)
Pin Description
PIN NAME
FUNCTION
1
OUT-
Inverting LVDS Output
2
GND
Ground
3 IN- Inverting LVPECL-Compatible Input
4
IN+
Noninverting LVPECL-Compatible
Input
5
VCC
Power Supply. Bypass VCC to GND
with a 0.01µF ceramic capacitor.
6
OUT+
Noninverting LVDS Output
Table 1. Function Table (Figure 2)
INPUT, VID
> 50mV
< -50mV
50mV > VID > -50mV
Open
OUTPUT, VOD
High
Low
Indeterminate
High
Note: VID = (IN+ - IN-), VOD = (OUT+ - OUT-)
High = 450mV ≥ VOD ≥ 250mV
Low = -250mV ≥ VOD ≥ -450mV
Detailed Description
The LVDS interface standard is a signaling method
intended for point-to-point communication over a con-
trolled-impedance medium, as defined by the ANSI/
TIA/EIA-644 and IEEE 1596.3 standards. The LVDS
standard uses a lower voltage swing than other com-
mon communication standards, achieving higher data
rates with reduced power consumption while reducing
EMI emissions and system susceptibility to noise.
The MAX9156 is a 200Mbps LVDS translator intended
for high-speed, point-to-point, low-power applications.
The MAX9156 accepts differential LVPECL inputs and
produces an LVDS output. The input voltage range
includes signals from GND up to VCC, allowing interop-
eration with 3.3V LVPECL devices.
The MAX9156 provides a high output when the inputs
are open. See Table 1.
_______________________________________________________________________________________ 5
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet MAX9156.PDF ] | |
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