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PDF MAX9125EUE Data sheet ( Hoja de datos )
| Número de pieza | MAX9125EUE | |
| Descripción | Quad LVDS Line Receivers with Integrated Termination | |
| Fabricantes | Maxim Integrated | |
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19-1908; Rev 0; 5/01
EVAALVUAAILTAIOBNLEKIT
Quad LVDS Line Receivers with
Integrated Termination
General Description
The MAX9125/MAX9126 quad low-voltage differential
signaling (LVDS) line receivers are ideal for applica-
tions requiring high data rates, low power, and reduced
noise. The MAX9125/MAX9126 are guaranteed to
receive data at speeds up to 500Mbps (250MHz) over
controlled-impedance media of approximately 100Ω.
The transmission media may be printed circuit (PC)
board traces or cables.
The MAX9125/MAX9126 accept four LVDS differential
inputs and translate them to 3.3V CMOS outputs. The
MAX9126 features integrated parallel termination resis-
tors (nominally 115Ω), which eliminate the requirement
for four discrete termination resistors and reduce stub
length. The MAX9125 inputs are high impedance and
require an external termination resistor when used in a
point-to-point connection.
The devices support a wide common-mode input range
of 0.05V to 2.35V, allowing for ground potential differ-
ences and common-mode noise between the driver
and the receiver. A fail-safe feature sets the output high
when the inputs are open, or when the inputs are
undriven and shorted or parallel terminated. The EN
and EN inputs control the high-impedance output and
are common to all four receivers. Inputs conform to the
ANSI TIA/EIA-644 LVDS standard. The MAX9125/
MAX9126 operate from a single +3.3V supply, are
specified for operation from -40°C to +85°C, and are
available in 16-pin TSSOP and SO packages. Refer to
the MAX9124 data sheet for a quad LVDS line driver.
Features
o Integrated Termination Eliminates Four External
Resistors (MAX9126)
o Pin Compatible with DS90LV032A
o Guaranteed 500Mbps Data Rate
o 300ps Pulse Skew (max)
o Conform to ANSI TIA/EIA-644 LVDS Standard
o Single +3.3V Supply
o Low 70µA Shutdown Supply Current
o Fail-Safe Circuit
PART
MAX9125EUE
MAX9125ESE
MAX9126EUE
MAX9126ESE
Ordering Information
TEMP. RANGE
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
PIN-PACKAGE
16 TSSOP
16 SO
16 TSSOP
16 SO
Typical Application Circuit
LVDS SIGNALS
MAX9124
MAX9126
Applications
Digital Copiers
Laser Printers
Cellular Phone Base Stations
Add/Drop Muxes
Digital Cross-Connects
DSLAMs
Network Switches/Routers
Backplane Interconnect
Clock Distribution
Pin Configuration appears at end of data sheet.
TX
LVTTL/LVCMOS
DATA INPUT
TX
TX
TX
115Ω
RX
115Ω
RX
115Ω
RX
LVTTL/LVCMOS
DATA OUTPUT
115Ω
RX
100Ω SHIELDED TWISTED CABLE OR MICROSTRIP PC BOARD TRACES
________________________________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
1 page  
Quad LVDS Line Receivers with
Integrated Termination
Typical Operating Characteristics (continued)
(VCC = +3.3V, |VID| = 200mV, VCM = +1.2V, CL = 10pF, frequency = 10MHz, TA = +25°C, unless otherwise noted (Figures 2 and 3).)
DIFFERENTIAL PROPAGATION DELAY
vs. COMMON-MODE VOLTAGE
2.6
2.5
tPHLD
2.4
2.3
2.2
0
tPLHD
0.5 1.0 1.5 2.0
COMMON-MODE VOLTAGE (V)
2.5
DIFFERENTIAL PROPAGATION DELAY
vs. SUPPLY VOLTAGE
2.6
2.5
tPHLD
2.4
2.3
2.2
3.0
tPLHD
3.1 3.2 3.3 3.4 3.5
SUPPLY VOLTAGE (V)
3.6
PULSE SKEW vs. SUPPLY VOLTAGE
200
175
150
125
100
75
50
3.0
3.1 3.2 3.3 3.4 3.5
SUPPLY VOLTAGE (V)
3.6
PULSE SKEW vs. TEMPERATURE
200
175
150
125
100
75
50
-40 -15
10 35 60
TEMPERATURE (°C)
85
TRANSITION TIME vs. CAPACITIVE LOAD
1000
900
800 tTLH
700
600
500 tTHL
400
300
200
100
0
5 10 15 20 25
CAPACITIVE LOAD (pF)
Pin Description
PIN
1, 7, 9, 15
2, 6, 10, 14
3, 5, 11, 13
4, 12
8
16
NAME
IN_-
IN_+
OUT_
EN, EN
GND
VCC
FUNCTION
Inverting Differential Receiver Inputs
Noninverting Differential Receiver Inputs
LVCMOS/LVTTL Receiver Outputs
Receiver Enable Inputs. When EN = low and EN = high, the outputs are disabled and in high
impedance. For other combinations of EN and EN, the outputs are active.
Ground
Power Supply Input. Bypass VCC to GND with 0.1µF and 0.001µF ceramic capacitors.
_______________________________________________________________________________________ 5
5 Page 
Quad LVDS Line Receivers with
Integrated Termination
Package Information
______________________________________________________________________________________ 11
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet MAX9125EUE.PDF ] | |
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