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PDF MAX818M Data sheet ( Hoja de datos )
| Número de pieza | MAX818M | |
| Descripción | +5V Microprocessor Supervisory Circuits | |
| Fabricantes | Maxim Integrated | |
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19-0494; Rev 1; 3/96
+5V Microprocessor Supervisory Circuits
_______________General Description
The MAX817/MAX818/MAX819 microprocessor (µP)
supervisory circuits simplify power-supply monitoring,
battery control, and chip-enable gating in µP systems
by reducing the number of components required.
These devices are designed for use in +5V-powered
systems. Low supply current (11µA typical) and small
package size make these devices ideal for portable
applications. The MAX817/MAX818/MAX819 are specif-
ically designed to ignore fast transients on VCC. Other
supervisory functions include active-low reset, backup-
battery switchover, watchdog input, battery freshness
seal, and chip-enable gating. The Selector Guide below
lists the specific functions available from each device.
These devices offer two pretrimmed reset threshold volt-
ages for ±5% or ±10% power supplies: 4.65V for the L
versions and 4.40V for the M versions. The MAX817/
MAX818/MAX819 are available in space-saving µMAX
packages, as well as 8-pin DIP/SO.
_____________________Selector Guide
FEATURE
MAX817 MAX818 MAX819
L/M L/M L/M
Active-Low Reset
Backup-Battery Switchover
Power-Fail Comparator
—
Watchdog Input
—
Battery Freshness Seal
Manual Reset Input
——
Chip-Enable Gating
—
—
Pin-Package
8-DIP/SO/ 8-DIP/SO/ 8-DIP/SO/
µMAX µMAX µMAX
Low-Power, Pin-
MAX690A/
Compatible Upgrades for: MAX692A
—
MAX703/
MAX704
________________________Applications
Battery-Powered Computers and Controllers
Embedded Controllers
Intelligent Instruments
Critical µP Monitoring
Portable Equipment
____________________________Features
o Precision Supply-Voltage Monitor:
4.65V (MAX81_L)
4.40V (MAX81_M)
o 11µA Quiescent Supply Current
o 200ms Reset Time Delay
o Watchdog Timer with 1.6sec Timeout
(MAX817/MAX818)
o Battery-Backup Power Switching; Battery Voltage
Can Exceed VCC
o Battery Freshness Seal
o On-Board, 3ns Gating of Chip-Enable Signals
(MAX818)
o Uncommitted Voltage Monitor for Power-Fail or
Low-Battery Warning (MAX817/MAX819)
o Manual Reset Input (MAX819)
______________Ordering Information
PART†
TEMP. RANGE PIN-PACKAGE
MAX817_CPA
0°C to +70°C
8 Plastic DIP
MAX817_CSA
0°C to +70°C
8 SO
MAX817_CUA
0°C to +70°C
8 µMAX
Ordering Information continued on last page.
†These parts offer a choice of reset threshold voltage. From the
table below, select the suffix corresponding to the desired
threshold and insert it into the blank to complete the part number.
SUFFIX
L
M
RESET THRESHOLD (V)
4.65
4.40
_________________Pin Configurations
TOP VIEW
OUT 1
VCC 2
GND 3
PFI 4
MAX817
8 BATT
7 RESET
6 WDI
5 PFO
Typical Operating Circuit appears at end of data sheet.
*Patents Pending
DIP/SO/µMAX
Pin Configurations continued at end of data sheet.
________________________________________________________________ Maxim Integrated Products 1
For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800
1 page  
+5V Microprocessor Supervisory Circuits
__________________________________________Typical Operating Characteristics
(VCC = +5V, VBATT = 3.0V, TA = +25°C, unless otherwise noted.)
SUPPLY CURRENT
vs. TEMPERATURE (NO LOAD)
16
14
12
10
8
-40 -20
0 20 40 60
TEMPERATURE (°C)
80 100
BATT TO OUT ON-RESISTANCE
vs. TEMPERATURE
300
VCC = 0V
250
VBATT = 2.0V
200
150 VBATT = 2.8V
100 VBATT = 5.0V
50
0
-40 -20
0 20 40 60 80 100
TEMPERATURE (°C)
VCC TO RESET PROPAGATION DELAY
vs. TEMPERATURE
500
VCC FALLING AT:
0.25V/ms
400
300
1V/ms
200
10V/ms
100
BATTERY SUPPLY CURRENT
(BACKUP MODE) vs. TEMPERATURE
160
VCC = 0V
140
VBATT = 5.0V
120
100
80 VBATT = 2.8V
60 VBATT = 2.0V
40
20
0
-40 -20
0 20 40 60
TEMPERATURE (°C)
80 100
VCC TO OUT ON-RESISTANCE
vs. TEMPERATURE
7
CE IN TO CE OUT ON-RESISTANCE
vs. TEMPERATURE
100
90
VCE IN = 4V
80
70
60
VCE IN = 3V
50
40 VCE IN = 2V
30
20
10
0
-40 -20
0 20 40 60
TEMPERATURE (°C)
80 100
RESET TIMEOUT PERIOD
vs. TEMPERATURE
220
6 210
5 200
4 190
3
-40 -20
0 20 40 60 80 100
TEMPERATURE (°C)
WATCHDOG TIMEOUT PERIOD
vs. TEMPERATURE
1.70
180
-40 -20
0 20 40 60
TEMPERATURE (°C)
80 100
BATTERY FRESHNESS SEAL
LEAKAGE CURRENT vs. TEMPERATURE
20
1.65 15
1.60 10
1.55 5
0
-40 -20
0 20 40 60
TEMPERATURE (°C)
80 100
1.50
-40 -20
0 20 40 60 80 100
TEMPERATURE (°C)
0
-40 -20
0 20 40 60 80 100
TEMPERATURE (°C)
_______________________________________________________________________________________ 5
5 Page 
+5V Microprocessor Supervisory Circuits
Any time a reset is generated, the CE transmission gate
remains disabled and CE IN remains high impedance
(regardless of CE IN activity) for the reset timeout peri-
od. When the CE transmission gate is enabled, the
impedance of CE IN appears as a 40Ω resistor in series
with the load at CE OUT. The propagation delay
through the CE transmission gate depends on VCC, the
source impedance of the drive connected to CE IN,
and the loading on CE OUT (see Typical Operating
Characteristics). The CE propagation delay is produc-
tion tested from the 50% point on CE IN to the 50%
point on CE OUT using a 50Ω driver and a 50pF load
capacitance (Figure 7). For minimum propagation
delay, minimize the capacitive load at CE OUT and use
a low-output-impedance driver.
Chip-Enable Output (MAX818)
When the CE transmission gate is enabled, the imped-
ance of CE OUT is equivalent to a 40Ω resistor in series
with the source driving CE IN. In the disabled mode,
the transmission gate is off and an active pull-up con-
nects CE OUT to OUT (Figure 5). This pull-up turns off
when the transmission gate is enabled.
Power-Fail Comparator
(MAX817/MAX819)
The MAX817/MAX819 PFI input is compared to an inter-
nal reference. If PFI is less than the power-fail threshold
(VPFT), PFO goes low. The power-fail comparator is
intended for use as an undervoltage detector to signal a
failing power supply (Figure 8). However, the comparator
does not need to be dedicated to this function because it
is completely separate from the rest of the circuitry.
The power-fail comparator turns off and PFO goes low
when VCC falls below VBATT. During the reset timeout
period (tRP), PFO is forced high, regardless of the state
of VPFI (see Battery Freshness Seal section). If the com-
parator is unused, connect PFI to ground and leave PFO
unconnected. PFO can be connected to MR on the
MAX819 so that a low voltage on PFI will generate a
reset (Figure 9). In this configuration, when the monitored
voltage causes PFI to fall below VPFT, PFO pulls MR low,
causing a reset to be asserted. Reset remains asserted
as long as PFO holds MR low, and for tRP (200ms) after
PFO pulls MR high when the monitored supply is above
the programmed threshold. When PFO is connected to
MR, it is not possible to enable the battery freshness
seal. Enabling the battery freshness seal requires MR to
be high or open. Once the battery freshness seal is
enabled, it is no longer affected by PFO’s connection to
MR.
+5V
VCC
BATT
MAX818
CE IN
CE OUT
50Ω
50Ω
GND
50pF
CL*
VIN +5V
REGULATOR
POWER-FAIL-WARNING TRIP VOLTAGE
( )VWARN = 1.25
R1 + R2
R2
R1
PFI
R2
VCC
MAX817
MAX819
RESET
PFO
RESET
NMI µP
* CL INCLUDES LOAD CAPACITANCE, STRAY CAPACITANCE,
AND SCOPE-PROBE CAPACITANCE.
1.25V
Figure 7. CE Propagation Delay Test Circuit
Figure 8. Using the Power-Fail Comparator to Generate a
Power-Fail Warning
______________________________________________________________________________________ 11
11 Page | ||
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| PDF Descargar | [ Datasheet MAX818M.PDF ] | |
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