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PDF MAX795 Data sheet ( Hoja de datos )

Número de pieza MAX795
Descripción 3.0V/3.3V Adjustable Microprocessor Supervisory Circuits
Fabricantes Maxim Integrated 
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19-0366; Rev 1; 1/96
3.0V/3.3V Adjustable Microprocessor
Supervisory Circuits
_______________General Description
The MAX793/MAX794/MAX795 microprocessor (µP)
supervisory circuits monitor and control the activities of
+3.0V/+3.3V µPs by providing backup-battery switchover,
among other features such as low-line indication, µP
reset, write protection for CMOS RAM, and a watchdog
(see the Selector Guide below). The backup-battery volt-
age can exceed VCC, permitting the use of 3.6V lithium
batteries in systems using 3.0V to 3.3V for VCC.
The MAX793/MAX795 offer a choice of reset threshold
voltage range (denoted by suffix letter): 3.00V to 3.15V
(T), 2.85V to 3.00V (S), and 2.55V to 2.70V (R). The
MAX794’s reset threshold is set externally with a resistor
divider. The MAX793/MAX794 are available in 16-pin
DIP and narrow SO packages, and the MAX795 comes
in 8-pin DIP and SO packages. For similar devices
designed for 5V systems, see the µP Supervisory
Circuits table at the back of this data sheet.
_____________________Selector Guide
FEATURE
Active-Low Reset
Active-High Reset
Programmable Reset
Threshold
Low-Line Early Warning
Output
Backup-Battery
Switchover
External Switch Driver
Power-Fail Comparator
Battery OK Output
Watchdog Input
Battery Freshness Seal
Manual Reset Input
Chip-Enable Gating
Pins-Package
MAX793 MAX794 MAX795
16-DIP/SO 16-DIP/SO 8-DIP/SO
________________________Applications
Battery-Powered Computers and Controllers
Embedded Controllers
Intelligent Controllers
Critical µP Power Monitoring
Portable Equipment
Pin Configurations appear at end of data sheet.
____________________________Features
MAX793/MAX794/MAX795
o Precision Supply-Voltage Monitor:
Fixed Reset Trip Voltage (MAX793/MAX795)
Adjustable Reset Trip Voltage (MAX794)
o Guaranteed Reset Assertion to VCC = 1V
o Backup-Battery Power Switching—Battery
Voltage Can Exceed VCC
o On-Board Gating of Chip-Enable Signals—7ns
Max Propagation Delay
MAX793/MAX794 Only
o Battery Freshness Seal
o Battery OK Output (MAX793)
o Uncommitted Voltage Monitor for Power-Fail or
Low-Battery Warning
o Independent Watchdog Timer (1.6sec timeout)
o Manual Reset Input
______________Ordering Information
PART*
TEMP. RANGE
PIN-PACKAGE
MAX793_CPE
0°C to +70°C
16 Plastic DIP
MAX793_CSE
0°C to +70°C
16 Narrow SO
MAX793_EPE
-40°C to +85°C
16 Plastic DIP
MAX793_ESE
-40°C to +85°C
16 Narrow SO
Ordering Information continued on last page.
* The MAX793/MAX795 offer a choice of reset threshold voltage.
Select the letter corresponding to the desired reset threshold
voltage range (T = 3.00V to 3.15V, S = 2.85V to 3.00V, R = 2.55V
to 2.70V) and insert it into the blank to complete the part number.
The MAX794’s reset threshold is adjustable.
__________Typical Operating Circuit
3.0V OR 3.3V
0.1µF
3.6V 0.1µF
+5V SUPPLY
+5V FAILURE
(OPTIONAL)
Si9433DY
SILICONIX
PMOS
VCC BATT ON OUT
BATT CE OUT
0.1µF
CMOS
RAM
MAX793
WDO CE IN
MR WDI
PFO LOWLINE
ADDRESS
DECODER
VCC
VCC
A0-A15
I/O
NMI
µP
PFI RESET
BATT OK
GND
RESET
________________________________________________________________ Maxim Integrated Products 1
For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800

1 page




MAX795 pdf
3.0V/3.3V/Adjustable Microprocessor
Supervisory Circuits
__________________________________________Typical Operating Characteristics
(TA = +25°C, unless otherwise noted.)
VCC-TO-OUT ON-RESISTANCE
vs. TEMPERATURE
3.0
2.8 IOUT = 30mA
2.6
2.4
2.2
2.0 VCC = 3.0V
1.8
VCC = 3.3V
1.6 VCC = 5V
1.4
1.2
1.0
-40 -20
0 20 40 60
TEMPERATURE (°C)
80 100
BATT-TO-OUT ON-RESISTANCE
vs. TEMPERATURE
160
140 VBATT = 3.0V
120
VBATT = 3.6V
100
80
60
40
-40 -20
VBATT = 5V
IOUT = 250µA
VCC = 0V
0 20 40 60 80 100
TEMPERATURE (°C)
VCC SUPPLY CURRENT vs. TEMPERATURE
(NORMAL OPERATING MODE)
70
MAX793/4, VCC = 5V
60
MAX795, VCC = 5V
50
40 MAX793/4, VCC = 3.3V
30 MAX795, VCC = 3.3V
20
10
0
-40 -20
VBATT = VCC = VOUT
0 20 40 60 80 100
TEMPERATURE (°C)
BATTERY SUPPLY CURRENT vs.
TEMPERATURE (BATTERY-BACKUP MODE)
0.10
VCC = 0V
VBATT = 3.6V
0.08
0.06
0.04
0.02
0
-40 -20
0 20 40 60
TEMPERATURE (°C)
80 100
MAX793
LOWLINE-TO-RESET THRESHOLD
vs. TEMPERATURE
100
90 VCC FALLING
80
70
60
50
40
30
20
10
0
-40 -20
0 20 40 60
TEMPERATURE (°C)
80 100
RESET TIMEOUT PERIOD
vs. TEMPERATURE
250
200
150
100
50
0
-40 -20
VCC RISING FROM
OV TO VRST MAX
0 20 40 60 80 100
TEMPERATURE (°C)
MAX793/MAX794
LOWLINE COMPARATOR PROPAGATION DELAY
vs. TEMPERATURE
10
40mV OVERDRIVE
8 VCC RISING
6
4
VCC FALLING
2
0
-40 -20
0 20 40 60
TEMPERATURE (°C)
80 100
RESET COMPARATOR PROPAGATION DELAY
vs. TEMPERATURE (VCC FALLING)
30
25
20
15
10
5
0
-40 -20
0 20 40 60
TEMPERATURE (°C)
80 100
1.250
MAX793/MAX794
PFI THRESHOLD vs. TEMPERATURE
1.245
1.240
1.235
1.230
-40 -20
0 20 40 60
TEMPERATURE (°C)
80 100
_______________________________________________________________________________________ 5

5 Page





MAX795 arduino
3.0V/3.3V Adjustable Microprocessor
Supervisory Circuits
VRST
VCC
RESET
tRP
WDO
VCC
MAX793/MAX794
WDO RESET
MR
4.7k
TO µP
tWD
WDI
VCC
WDO
10µs
WDO CONNECTED TO µP INTERRUPT
RESET PULLED UP TO VCC
Figure 5. Watchdog Timing Relationship
RESET
WDI
tRP tWP tRP
either when a reset occurs or when a transition (low-to-
high or high-to-low) takes place at WDI. As long as
reset is asserted, the timer remains cleared and does
not count. As soon as reset is released or WDI
changes state, the timer starts counting (Figure 5).
WDI can detect pulses as short as 100ns. Unlike the
5V MAX690 family, the watchdog function cannot be
disabled.
Watchdog Output (MAX793/MAX794)
In the MAX793/MAX794, WDO remains high (WDO is
pulled up to VCC) if there is a transition or pulse at WDI
during the watchdog timeout period. WDO goes low if
no transition occurs at WDI during the watchdog timeout
period. The watchdog function is disabled and WDO is
a logic high when reset is asserted if VCC is above VSW.
WDO is a logic low when VCC is below VSW.
If a system reset is desired on every watchdog fault,
simply diode-OR connect WDO to MR (Figure 6).
When a watchdog fault occurs in this mode, WDO goes
low, pulling MR low, which causes a reset pulse to be
issued. Ten microseconds after reset is asserted, the
watchdog timer clears and WDO returns high. This
delay results in a 10µs pulse at WDO, allowing external
circuitry to “capture” a watchdog fault indication. A
continuous high or low on WDI will cause 200ms reset
pulses to be issued every 1.6sec.
Figure 6. Generating a Reset on Each Watchdog Fault
Chip-Enable Signal Gating
Internal gating of chip-enable (CE) signals prevents erro-
neous data from corrupting CMOS RAM in the event of an
undervoltage condition. The MAX793/MAX794/MAX795
use a series transmission gate from CE IN to CE OUT
(Figure 7). During normal operation (reset not asserted),
the CE transmission gate is enabled and passes all CE
transitions. When reset is asserted, this path becomes
disabled, preventing erroneous data from corrupting the
CMOS RAM. The short CE propagation delay from CE IN
to CE OUT enables these µP supervisors to be used with
most µPs. If CE IN is low when reset asserts, CE OUT
remains low for typically 10µs to permit completion of the
current write cycle.
Chip-Enable Input
The CE transmission gate is disabled and CE IN is high
impedance (disabled mode) while reset is asserted.
During a power-down sequence when VCC passes the
reset threshold, the CE transmission gate disables and
CE IN immediately becomes high impedance if the volt-
age at CE IN is high. If CE IN is low when reset
asserts, the CE transmission gate will disable at the
moment CE IN goes high, or 10µs after reset asserts,
whichever occurs first (Figure 8). This permits the cur-
rent write cycle to complete during power-down.
______________________________________________________________________________________ 11

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