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PDF MCM69L736A Data sheet ( Hoja de datos )
| Número de pieza | MCM69L736A | |
| Descripción | 4M Late Write HSTL | |
| Fabricantes | Motorola Semiconductors | |
| Logotipo |  |
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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Advance Information
4M Late Write HSTL
The MCM69L736A/818A is a 4M synchronous late write fast static RAM
designed to provide high performance in secondary cache and ATM switch,
Telecom, and other high speed memory applications. The MCM69L818A
(organized as 256K words by 18 bits) and the MCM69L736A (organized as 128K
words by 36 bits) are fabricated in Motorola’s high performance silicon gate
BiCMOS technology.
The differential clock (CK) inputs control the timing of read/write operations of
the RAM. At the rising edge of CK, all addresses, write enables, and synchronous
selects are registered. An internal buffer and special logic enable the memory to
accept write data on the rising edge of CK a cycle after address and control
signals. Read data is available at the falling edge of CK.
The RAM uses HSTL inputs and outputs. The adjustable input trip–point (Vref)
and output voltage (VDDQ) gives the system designer greater flexibility in
optimizing system performance.
The synchronous write and byte enables allow writing to individual bytes or the
entire word.
The impedance of the output buffers is programmable, allowing the outputs to
match the impedance of the circuit traces which reduces signal reflections.
• Byte Write Control
• Single 3.3 V +10%, – 5% Operation
• HSTL — I/O (JEDEC Standard JESD8–6 Class I)
• HSTL — User Selectable Input Trip–Point
• HSTL — Compatible Programmable Impedance Output Drivers
• Register to Latch Synchronous Operation
• Asynchronous Output Enable
• Boundary Scan (JTAG) IEEE 1149.1 Compatible
• Differential Clock Inputs
• Optional x18 or x36 Organization
• MCM69L736A/818A–7.5 = 7.5 ns
MCM69L736A/818A–8.5 = 8.5 ns
MCM69L736A/818A–9.5 = 9.5 ns
MCM69L736A/818A–10.5 = 10.5 ns
• 119 Bump, 50 mil (1.27 mm) Pitch, 14 mm x 22 mm Plastic Ball Grid Array
(PBGA) Package
Order this document
by MCM69L736A/D
MCM69L736A
MCM69L818A
ZP PACKAGE
PBGA
CASE 999–01
This document contains information on a new product. Specifications and information herein are subject to change without notice.
4/3/97
M© OMoTtoOroRla,OInLc.A19F97AST SRAM
MCM69L736A•MCM69L818A
1
1 page  
ABSOLUTE MAXIMUM RATINGS (Voltages Referenced to VSS, See Note 1)
Rating
Symbol
Value
Unit
Core Supply Voltage
VDD
– 0.5 to + 4.6
V
Output Supply Voltage
VDDQ – 0.5 to VDD + 0.5 V
Voltage On Any Pin
Vin – 0.5 to VDD + 0.5 V
Input Current (per I/O)
Iin ± 50 mA
Output Current (per I/O)
Iout ± 70 mA
Power Dissipation (See Note 2)
PD — W
Operating Temperature
TA
0 to + 70
°C
Temperature Under Bias
Tbias
–10 to + 85
°C
Storage Temperature
Tstg
– 55 to + 125
°C
NOTES:
1. Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are
exceeded. Functional operation should be restricted to RECOMMENDED OPER-
ATING CONDITIONS. Exposure to higher than recommended voltages for extended
periods of time could affect device reliability.
2. Power dissipation capability will be dependent upon package characteristics and use
environment. See enclosed thermal impedance data.
This device contains circuitry to protect the
inputs against damage due to high static volt-
ages or electric fields; however, it is advised
that normal precautions be taken to avoid
application of any voltage higher than maxi-
mum rated voltages to this high–impedance
circuit.
This BiCMOS memory circuit has been
designed to meet the dc and ac specifications
shown in the tables, after thermal equilibrium
has been established.
This device contains circuitry that will ensure
the output devices are in High–Z at power up.
PBGA PACKAGE THERMAL CHARACTERISTICS
Rating
Symbol
Max Unit Notes
Junction to Ambient (Still Air)
RθJA
53
°C/W
1, 2
Junction to Ambient (@200 ft/min)
Single Layer Board
RθJA
38
°C/W
1, 2
Junction to Ambient (@200 ft/min)
Four Layer Board
RθJA
22 °C/W
Junction to Board (Bottom)
RθJB
14
°C/W
3
Junction to Case (Top)
RθJC
5
°C/W
4
NOTES:
1. Junction temperature is a function of on–chip power dissipation, package thermal resistance, mounting site (board) temperature, ambient
temperature, air flow, power dissipation of other components on the board, and board thermal resistance.
2. Per SEMI G38–87.
3. Indicates the average thermal resistance between the die and the printed circuit board.
4. Indicates the average thermal resistance between the die and the case top surface as measured by the cold plate method (MIL SPEC–883
Method 1012.1).
MOTOROLA FAST SRAM
MCM69L736A•MCM69L818A
5
5 Page 
REGISTER LATCH READ–WRITE–READ CYCLES
(G Controlled)
CK
SA A0 A1 A2 A3
SS
SW
A4
SBx
G
t GHQZ
t GLQV
t GLQX
t GHQX
DQ
Q0
Q1 D2
Q3
Q4
READ
READ
WRITE
READ DESELECT (HIGH–Z)
READ
MOTOROLA FAST SRAM
MCM69L736A•MCM69L818A
11
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| Páginas | Total 20 Páginas | |
| PDF Descargar | [ Datasheet MCM69L736A.PDF ] | |
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