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74VHC02T Schematic ( PDF Datasheet ) - STMicroelectronics

Teilenummer 74VHC02T
Beschreibung QUAD 2-INPUT NOR GATE
Hersteller STMicroelectronics
Logo STMicroelectronics Logo 




Gesamt 11 Seiten
74VHC02T Datasheet, Funktion
74VHC02
QUAD 2-INPUT NOR GATE
s HIGH SPEED: tPD = 3.6ns (TYP.) at VCC = 5V
s LOW POWER DISSIPATION:
ICC = 2 µA (MAX.) at TA=25°C
s HIGH NOISE IMMUNITY:
VNIH = VNIL = 28% VCC (MIN.)
s POWER DOWN PROTECTION ON INPUTS
s SYMMETRICAL OUTPUT IMPEDANCE:
|IOH| = IOL = 8mA (MIN)
s BALANCED PROPAGATION DELAYS:
tPLH tPHL
s OPERATING VOLTAGE RANGE:
VCC(OPR) = 2V to 5.5V
s PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 02
s IMPROVED LATCH-UP IMMUNITY
s LOW NOISE: VOLP = 0.8V (MAX.)
DESCRIPTION
The 74VHC02 is an advanced high-speed CMOS
QUAD 2-INPUT NOR GATE fabricated with
sub-micron silicon gate and double-layer metal
wiring C2MOS technology.
The internal circuit is composed of 3 stages
including buffer output, which provides high noise
immunity and stable output.
SOP
TSSOP
Table 1: Order Codes
PACKAGE
SOP
TSSOP
T&R
74VHC02MTR
74VHC02TTR
Power down protection is provided on all inputs
and 0 to 7V can be accepted on inputs with no
regard to the supply voltage. This device can be
used to interface 5V to 3V.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
Figure 1: Pin Connection And IEC Logic Symbols
November 2004
Rev. 5
1/11






74VHC02T Datasheet, Funktion
74VHC02
DIM.
A
A1
A2
B
C
D
E
e
H
h
L
k
ddd
MIN.
1.35
0.1
1.10
0.33
0.19
8.55
3.8
5.8
0.25
0.4
0°
SO-14 MECHANICAL DATA
mm.
TYP
1.27
MAX.
1.75
0.25
1.65
0.51
0.25
8.75
4.0
6.2
0.50
1.27
8°
0.100
MIN.
0.053
0.004
0.043
0.013
0.007
0.337
0.150
0.228
0.010
0.016
0°
inch
TYP.
0.050
MAX.
0.069
0.010
0.065
0.020
0.010
0.344
0.157
0.244
0.020
0.050
8°
0.004
6/11
0016019D

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