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PDF 74V1T00 Data sheet ( Hoja de datos )
| Número de pieza | 74V1T00 | |
| Descripción | SINGLE 2-INPUT NAND GATE | |
| Fabricantes | STMicroelectronics | |
| Logotipo |  |
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® 74V1T00
SINGLE 2-INPUT NAND GATE
s HIGH SPEED: tPD = 5 ns (TYP.) at VCC = 5V
s LOW POWER DISSIPATION:
ICC = 1 µA (MAX.) at TA = 25 oC
s COMPATIBLE WITH TTL OUTPUTS:
VIH = 2V (MIN), VIL = 0.8V (MAX)
s POWER DOWN PROTECTION ON INPUTS &
OUTPUT
s SYMMETRICAL OUTPUT IMPEDANCE:
|IOH| = IOL = 8 mA (MIN)
s BALANCED PROPAGATION DELAYS:
tPLH ≅ tPHL
s OPERATING VOLTAGE RANGE:
VCC (OPR) = 4.5V to 5.5V
s IMPROVED LATCH-UP IMMUNITY
DESCRIPTION
The 74V1T00 is an advanced high-speed CMOS
SINGLE 2-INPUT NAND GATE fabricated with
sub-micron silicon gate and double-layer metal
wiring C2MOS technology.
S
(SOT23-5L)
C
(SC-70)
ORDER CODE:
74V1T00S
74V1T00C
The internal circuit is composed of 3 stages
including buffer output, which provide high noise
immunity and stable output.
Power down protection is provided on all inputs
and 0 to 7V can be accepted on inputs with no
regard to the supply voltage. This device can be
used to interface 5V to 3V.
PIN CONNECTION AND IEC LOGIC SYMBOLS
October 1999
1/7
1 page  
DIM.
A
A1
A2
b
C
D
E
E1
L
e
e1
SOT23-5L MECHANICAL DATA
MIN.
0.90
0.00
0.90
0.35
0.09
2.80
2.60
1.50
0.35
mm
TYP.
0.95
1.9
MAX.
1.45
0.15
1.30
0.50
0.20
3.00
3.00
1.75
0.55
MIN.
35.4
0.0
35.4
13.7
3.5
110.2
102.3
59.0
13.7
mils
TYP.
37.4
74.8
74V1T00
MAX.
57.1
5.9
51.2
19.7
7.8
118.1
118.1
68.8
21.6
5/7
5 Page | ||
| Páginas | Total 7 Páginas | |
| PDF Descargar | [ Datasheet 74V1T00.PDF ] | |
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