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74LVT162374 Schematic ( PDF Datasheet ) - NXP Semiconductors

Teilenummer 74LVT162374
Beschreibung 3.3 V 16-bit edge-triggered D-type flip-flop with 30 OHM termination resistors; 3-state
Hersteller NXP Semiconductors
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Gesamt 17 Seiten
74LVT162374 Datasheet, Funktion
74LVT162374
3.3 V 16-bit edge-triggered D-type flip-flop with 30
termination resistors; 3-state
Rev. 03 — 17 January 2005
Product data sheet
1. General description
The 74LVT162374 is a high performance BiCMOS product designed for VCC operation at
3.3 V.
The 74LVT162374 is designed with 30 series resistance in both the HIGH and LOW
states of the output. This design reduces line noise in applications such as memory
address drivers, clock drivers, and bus receivers/transmitters.
This device is a 16-bit edge-triggered D-type flip-flop featuring non-inverting 3-state
outputs. The device can be used as two 8-bit flip-flops or one 16-bit flip-flop. On the
positive transition of the clock (CP), the Q outputs of the flip-flop take on the logic levels
set up at the D inputs.
2. Features
s 16-bit edge-triggered flip-flop
s 3-state buffers
s Output capability: +12 mA and 12 mA
s TTL input and output switching levels
s Input and output interface capability to systems at 5 V supply
s Bus-hold data inputs eliminate the need for external pull-up resistors to hold unused
inputs
s Live insertion and extraction permitted
s Outputs include series resistance of 30 making external resistors unnecessary
s Power-up reset
s Power-up 3-state
s No bus current loading when output is tied to 5 V bus
s Latch-up protection exceeds 500 mA per JESD78
s ESD protection:
x MIL STD 883 method 3015: exceeds 2000 V
x Machine model: exceeds 200 V






74LVT162374 Datasheet, Funktion
Philips Semiconductors
74LVT162374
3.3 V 16-bit edge-triggered D-type flip-flop
Table 3:
Symbol
1D5
1D4
VCC
1D3
1D2
GND
1D1
1D0
1CP
Pin description
Pin
40
41
42
43
44
45
46
47
48
Description
data input
data input
supply voltage
data input
data input
ground (0 V)
data input
data input
clock pulse input (active rising edge)
7. Functional description
7.1 Function table
Table 4: Function table [1]
Operating mode
Input
Internal register Output
nOE
nCP
nDn
nQ0 to nQ7
Load and read
L
l
L
register
LhH
L
H
Hold
L NC X NC
NC
Disable outputs
H
NC X
NC
Z
H nDn nDn
Z
[1] H = HIGH voltage level;
h = HIGH voltage level one set-up time prior to the HIGH-to-LOW clock transition;
L = LOW voltage level;
l = LOW voltage level one set-up time prior to the HIGH-to-LOW clock transition;
NC = no change;
X = don’t care;
Z = high-impedance OFF-state;
= LOW-to-HIGH clock transition.
8. Limiting values
Table 5: Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to
GND (ground = 0 V)
Symbol Parameter
Conditions
Min Max Unit
VCC supply voltage
0.5 +4.6 V
IIK input diode current VI < 0 V
50 -
mA
VI input voltage
[1] 0.5
+7.0
V
IOK output diode current VO < 0 V
50 -
mA
VO
output voltage
output in OFF-state or
[1] 0.5
+7.0
V
HIGH-state
9397 750 14401
Product data sheet
Rev. 03 — 17 January 2005
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
6 of 17

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74LVT162374 pdf, datenblatt
Philips Semiconductors
74LVT162374
3.3 V 16-bit edge-triggered D-type flip-flop
Table 10: Test data
Supply
voltage
2.7 V
Repetition rate Input
Load
10 MHz
tW
tr, tf
CL
500 ns 2.5 ns 50 pF
RL
500
VEXT
tPHZ, tPZH
GND
tPLZ, tPZL
6V
tPLH, tPHL
open
9397 750 14401
Product data sheet
Rev. 03 — 17 January 2005
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
12 of 17

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