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PDF MAX5250 Data sheet ( Hoja de datos )
| Número de pieza | MAX5250 | |
| Descripción | Low-Power / Quad / 10-Bit Voltage-Output DAC with Serial Interface | |
| Fabricantes | Maxim Integrated | |
| Logotipo |  |
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19-1171; Rev 0; 12/96
Low-Power, Quad, 10-Bit Voltage-Output DAC
with Serial Interface
__________________General Description ______________________________Features
The +5V MAX5250 combines four low-power, voltage-
output, 10-bit digital-to-analog converters (DACs) and
four precision output amplifiers in a space-saving, 20-
pin package. In addition to the four voltage outputs,
each amplifier’s negative input is also available to the
user. This facilitates specific gain configurations, remote
sensing, and high output drive capacity, making the
MAX5250 ideal for industrial-process-control applica-
tions. Other features include software shutdown, hard-
ware shutdown lockout, an active-low reset that clears
all registers and DACs to zero, a user-programmable
logic output, and a serial-data output.
Each DAC has a double-buffered input organized as an
input register followed by a DAC register. A 16-bit serial
word loads data into each input/DAC register. The
3-wire serial interface is compatible with SPI™/QSPI™
and Microwire™. It allows the input and DAC registers to
be updated independently or simultaneously with a sin-
gle software command. All logic inputs are TTL/CMOS-
logic compatible.
________________________Applications
Digital Offset and Gain Adjustment
Microprocessor-Controlled Systems
Industrial Process Controls
Automatic Test Equipment
o Four 10-Bit DACs with Configurable
Output Amplifiers
o +5V Single-Supply Operation
o Low Supply Current: 0.85mA Normal Operation
10µA Shutdown Mode
o Available in 20-Pin SSOP and DIP Packages
o Power-On Reset Clears all Registers and
DACs to Zero
o SPI/QSPI and Microwire Compatible
o Simultaneous or Independent Control of DACs
via 3-Wire Serial Interface
o User-Programmable Digital Output
o Schmitt-Trigger Inputs for Direct Optocoupler
Interface
o 12-Bit Upgrade Available: MAX525
_________________Ordering Information
PART
TEMP. RANGE
PIN-PACKAGE
INL
(LSB)
MAX5250ACPP 0°C to +70°C 20 Plastic DIP ±1/2
MAX5250BCPP 0°C to +70°C 20 Plastic DIP ±1
MAX5250ACAP 0°C to +70°C 20 SSOP
MAX5250BCAP 0°C to +70°C 20 SSOP
±1/2
±1
Ordering Information continued on last page.
Remote Industrial Controls
Pin Configuration appears at end of data sheet.
Motion Control
_________________________________________________________________________Functional Diagram
DOUT CL
PDL DGND AGND VDD
REFAB
DECODE
CONTROL
INPUT
REGISTER A
MAX5250
DAC
REGISTER A
DAC A
FBA
OUTA
FBB
16-BIT
SHIFT
REGISTER
SR
CONTROL
LOGIC
OUTPUT
INPUT
REGISTER B
DAC
REGISTER B
INPUT
REGISTER C
DAC
REGISTER C
INPUT
REGISTER D
DAC
REGISTER D
DAC B
DAC C
DAC D
OUTB
FBC
OUTC
FBD
OUTD
CS DIN SCLK UPO
REFCD
SPI and QSPI are trademarks of Motorola, Inc. Microwire is a trademark of National Semiconductor Corp.
________________________________________________________________ Maxim Integrated Products 1
For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800
1 page  
Low-Power, Quad, 10-Bit Voltage-Output DAC
with Serial Interface
____________________________Typical Operating Characteristics (continued)
(VDD = +5V, TA = +25°C, unless otherwise noted.)
SUPPLY CURRENT
vs. SUPPLY VOLTAGE
1000
950
900
850
800
750
700
650
CODE = FFC hex
600
4.0 4.2 4.4 4.6 4.8 5.0 5.2 5.4 5.6
SUPPLY VOLTAGE (V)
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. FREQUENCY
0.50
DAC CODE = FULL SCALE
0.45 REFAB = 1Vp-p
0.40 RL = 5kΩ
0.35 CL = 100pF
0.30
0.25
0.20
0.15
0.10
0.05
0
1 10 100
FREQUENCY (kHz)
OUTPUT FFT PLOT
0
VREF = 1kHz, 0.006V TO 3.6V
RL = 5kΩ
-20 CL = 100pF
-40
-60
-80
-100
0.5
1.6 2.7 3.8 4.9
FREQUENCY (kHz)
6.0
FULL-SCALE ERROR
vs. LOAD
0
-0.25
-0.50
-0.75
-1.00
-1.25
0.01
0.1 1 10
LOAD (kΩ)
100
REFERENCE FEEDTHROUGH
AT 1kHz
0
REFAB INPUT SIGNAL
-20 VREF = 3.6Vp-p @ 1kHz
RL = 5kΩ
CL = 100pF
-40
-60
OUTA FEEDTHROUGH
-80
-100
0.5
1.2 1.9 2.6 3.3
FREQUENCY (kHz)
4.0
_______________________________________________________________________________________ 5
5 Page 
Low-Power, Quad, 10-Bit Voltage-Output DAC
with Serial Interface
CS
SCLK
DIN
DOUT
(MODE 0)
DOUT
(MODE 1)
COMMAND
EXECUTED
1
89
16
A1 A0 C1 C0 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 S1 S0
DATA PACKET (N)
A1 A0 C1 C0 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 S1 S0 A1
MSB FROM
PREVIOUS WRITE
DATA PACKET (N-1)
DATA PACKET (N)
A1 A0 C1 C0 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 S1 S0 A1
MSB FROM
PREVIOUS WRITE
DATA PACKET (N-1)
DATA PACKET (N)
Figure 5. Serial-Interface Timing Diagram
CS
SCLK
DIN
DOUT
tCSO tCSS
tDS tDH
tCH
tCL
tCSW
tCP tCSH
tCS1
tDO1 tDO2
Figure 6. Detailed Serial-Interface Timing Diagram
Power-Down (PDL)
The power-down lockout pin PDL disables software
shutdown when low. When in shutdown, transitioning
PDL from high to low wakes up the part with the output
set to the state prior to shutdown. PDL can also be
used to wake up the device asynchronously.
Daisy Chaining Devices
Any number of MAX5250s can be daisy chained by
connecting the DOUT pin of one device to the DIN pin
of the following device in the chain (Figure 7).
Since the MAX5250’s DOUT pin has an internal active
pull-up, the DOUT sink/source capability determines
the time required to discharge/charge a capacitive
load. Refer to the serial-data-out VOH and VOL specifi-
cations in the Electrical Characteristics.
Figure 8 shows an alternate method of connecting sev-
eral MAX5250s. In this configuration, the data bus is
common to all devices; data is not shifted through a
daisy chain. More I/O lines are required in this configu-
ration because a dedicated chip-select input (CS) is
required for each IC.
______________________________________________________________________________________ 11
11 Page | ||
| Páginas | Total 16 Páginas | |
| PDF Descargar | [ Datasheet MAX5250.PDF ] | |
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