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PDF MAX4533CAP Data sheet ( Hoja de datos )
| Número de pieza | MAX4533CAP | |
| Descripción | Quad / Rail-to-Rail / Fault-Protected / SPDT Analog Switch | |
| Fabricantes | Maxim Integrated | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de MAX4533CAP (archivo pdf) en la parte inferior de esta página. Total 12 Páginas | ||
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19-1452; Rev 0; 4/99
Quad, Rail-to-Rail, Fault-Protected,
SPDT Analog Switch
General Description
The MAX4533 quad, single-pole/double-throw (SPDT),
fault-protected analog switch is pin-compatible with the
industry-standard MAX333 and MAX333A. The MAX4533
features fault-protected inputs and Rail-to-Rail® signal
handling. The normally open (NO_ ) and normally closed
(NC_ ) terminals are protected from overvoltage faults up
to ±25V with power on and up to ±40V with power off.
During a fault condition, NO_ and NC_ become high
impedance with only nanoamperes of leakage current
flowing to the source. In addition, the output (COM_)
clamps to the appropriate polarity supply rail and pro-
vides up to ±10mA of load current. This ensures unam-
biguous rail-to-rail outputs when a fault occurs.
The MAX4533 operates from dual ±4.5V to ±18V power
supplies or a single +9V to +36V supply. All digital inputs
have +0.8V and +2.4V logic thresholds, ensuring both
TTL and CMOS logic compatibility when using ±15V
supplies or a +12V supply. On-resistance is 175Ω max
and is matched between switches to 10Ω max. The off-
leakage current is only 0.5nA at TA = +25°C and 10nA at
TA = +85°C.
Applications
Redundant/Backup Systems Portable Instruments
Test Equipment
Communications Systems
Data-Acquisition
Systems
Industrial and Process Control Avionics Systems
Typical Operating Circuit
INPUTS
V1
V2
OUTPUTS
V1 - V2
OSC
IN
MAX4533
V3 V3 - V4
V4
FLYING CAPACITOR LEVEL TRANSLATOR
(2-CHANNEL)
Rail-to-Rail is a registered trademark of Nippon Motorola, Ltd.
† Patent Pending
Features
o Rail-to-Rail Signal Handling
o ±40V Fault Protection with Power Off
±25V Fault Protection with ±15V Supplies
o All Switches Off with Power Off
o No Power-Supply Sequencing Required During
Power-Up or Power-Down
o Output Clamped to Appropriate Supply Voltage
During Fault Condition—No Transition Glitch
o 1kΩ (typ) Output Clamp Resistance During
Overvoltage
o 175Ω (max) Signal Paths with ±15V Supplies
o 20ns (typ) Fault Response Time
o ±4.5V to ±18V Dual Supplies
+9V to +36V Single Supply
o Pin-Compatible with Industry-Standard
MAX333/MAX333A
o TTL/CMOS-Compatible Logic Inputs with ±15V or
Single +9V to +15V Supplies
Ordering Information
PART
TEMP. RANGE PIN-PACKAGE
MAX4533CAP
0°C to +70°C
20 SSOP
MAX4533CSP
0°C to +70°C
20 Wide SO
Ordering Information continued at end of data sheet.
Pin Configuration/
Functional Diagram
TOP VIEW
IN1 1
NO1 2
COM1 3
NC1 4
V- 5
GND 6
NC2 7
COM2 8
NO2 9
IN2 10
MAX4533
20 IN4
19 NO4
18 COM4
17 NC4
16 V+
15 N.C.
14 NC3
13 COM3
12 NO3
11 IN3
SSOP/SO/DIP/CERDIP
SWITCHES ARE SHOWN WITH LOGIC "0" INPUT
N.C. = NOT INTERNALLY CONNECTED
________________________________________________________________ Maxim Integrated Products 1
For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800.
For small orders, phone 1-800-835-8769.
1 page  
Quad, Rail-to-Rail, Fault-Protected,
SPDT Analog Switch
ELECTRICAL CHARACTERISTICS—Single Supply (continued)
(V+ = +12V, V- = 0, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) (Note 3)
PARAMETER
SYMBOL
SWITCH DYNAMIC CHARACTERISTICS
Turn-On Time
tON
Turn-Off Time
tOFF
CONDITIONS
VCOM_ = +10V,
RL = 2kΩ; Figure 2
VCOM_ = +10V,
RL = 2kΩ; Figure 2
TA MIN
+25°C
C, E, M
+25°C
C, E, M
TYP
200
100
Break-Before-Make Time Delay
tBBM
VCOM_ = +10V,
RL = 1kΩ; Figure 3
+25°C 5 100
Charge Injection
Q
CL = 100pF,
VCOM_ = 0; Figure 4
+25°C
2
NO_ or NC_ Off-Capacitance
COM_ On-Capacitance
CN_(OFF) f = 1MHz; Figure 5
CCOM_(ON) f = 1MHz; Figure 5
+25°C
+25°C
5
15
Off-Isolation (Note 7)
VISO
RL = 50Ω, CL = 15pF,
VNO_ = 1VRMS, f = 1MHz;
Figure 6
+25°C
-62
MAX
500
1000
300
900
UNITS
ns
ns
ns
pC
pF
pF
dB
Channel-to-Channel Crosstalk
(Note 8)
POWER SUPPLY
Power-Supply Range
V+ Supply Current
V- and GND Supply Current
RL = 50Ω, CL = 15pF,
VCT VNO_ = 1VRMS, f = 1MHz;
Figure 6
V+
I+
IGND
All VIN_ = 0 or +5V,
VNO_ = VNC_ = 0
All VIN_ = 0 or +12V,
VNO_ = VNC_ = 0
All VIN_ = 0 or +5V,
VNO_ = VNC_ = 0
+25°C
C, E, M
+25°C
C, E, M
+25°C
C, E, M
+25°C
C, E, M
9
-65
36
350
550
200
350
350
550
dB
V
µA
µA
µA
Note 3: The algebraic convention is used in this data sheet; the most negative value is shown in the minimum column.
Note 4: ∆RON = RON(MAX) - RON(MIN).
Note 5: Leakage parameters are 100% tested at maximum rated hot temperature and guaranteed by correlation at TA = +25°C.
Note 6: Guaranteed by design.
Note 7: Off-isolation = 20log10(VCOM_ / VNO_), VCOM_ = output, VNO_ = input to off switch.
Note 8: Between any two analog inputs.
Note 9: Leakage testing for single-supply operation is guaranteed by testing with dual supplies.
_______________________________________________________________________________________ 5
5 Page 
Quad, Rail-to-Rail, Fault-Protected,
SPDT Analog Switch
Test Circuits/Timing Diagrams (continued)
LOGIC
INPUT
+3V
0V
VCOM
50%
VO1
SWITCH 0V
OUTPUT VCOM
SWITCH
OUTPUT
0V
VO2
tD
0.9VO
tD
Figure 3. Break-Before-Make
VIN_
IN_
50Ω
V+
V+
VCOM_
MAX4533
0.9VO
+15V
MAX4533
LOGIC
INPUT
VCOM COM_
V+
IN_
NO
NC
GND V-
VO2 RL1
RL2
CL2
VO1
CL1
-15V RL = 1000Ω
CL = 35pF
CL INCLUDES FIXTURE AND STRAY CAPACITANCE.
LOGIC 0 INPUT.
V+
VIN_
0V
NC_ OR NO_
GND V-
V-
VOUT
CL
100pF
V- IS CONNECTED TO GND (0V) FOR SINGLE-SUPPLY OPERATION.
Figure 4. Charge Injection
VOUT
∆ VOUT
∆ VOUT IS THE MEASURED VOLTAGE DUE TO CHARGE-
TRANSFER ERROR Q WHEN THE CHANNEL TURNS OFF.
Q = ∆ VOUT x CL
ADDRESS SELECT
V+
V+
V+ NO_
MAX4533 NC_
IN_ COM_
GND V-
1MHz
CAPACITANCE
ANALYZER
V-
V- IS CONNECTED TO GND (0V) FOR SINGLE-SUPPLY OPERATION.
Figure 5. COM_, NO_, NC_ Capacitance
______________________________________________________________________________________ 11
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet MAX4533CAP.PDF ] | |
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