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MH16V724AWJ-6 Schematic ( PDF Datasheet ) - Mitsubishi

Teilenummer MH16V724AWJ-6
Beschreibung FAST PAGE MODE 1207959552 - BIT ( 16777216 - WORD BY 72 - BIT ) DYNAMIC RAM
Hersteller Mitsubishi
Logo Mitsubishi Logo 




Gesamt 20 Seiten
MH16V724AWJ-6 Datasheet, Funktion
Preliminary Spec.
Specifications subject to
change without notice.
MITSUBISHI LSIs
MH16V724AWJ -5, -6
FAST PAGE MODE 1207959552 - BIT ( 16777216 - WORD BY 72 - BIT ) DYNAMIC RAM
DESCRIPTION
The MH16V724AWJ is 16777216-word x 64-bit dynamic
ram module. This consist of eighteen industry standard
16M x 4 dynamic RAMs in SOJ and one industry standard
EEPROM in TSSOP.
The mounting of SOJs and TSSOP on a card edge dual
in-line package provides any application where high
densities and large of quantities memory are required.
This is a socket-type memory module ,suitable for easy
interchange or addition of module.
FEATURES
Type name
/RAS /CAS Address /OE Cycle Power
access access access access
time time time time time dissipation
(max.ns) (max.ns) (max.ns) (max.ns) (min.ns) (typ.W)
MH16V724AWJ-5 50 13 25 13 90 7.02
MH16V724AWJ-6 60 15 30 15 110 5.85
PIN CONFIGURATION
85pin 1pin
94pin
95pin
10pin
11pin
Utilizes industry standard 16M x 4 RAMs in SOJ and industry
standard EEPROM in TSSOP
168-pin (84-pin dual dual in-line package)
Single +3.3V(±0.3V) supply operation
Low stand-by power dissipation
19.44mW(Max) . . . . . . . . . . . . . . . . . . . LVCMOS input level
Low operation power dissipation
MH16V724AWJ -5 . . . . . . . . . . . . . . . . . . 8.43W(Max)
MH16V724AWJ -6 . . . . . . . . . . . . . . . . . . 7.78W(Max)
All input are directly LVTTL compatible
All output are three-state and directly LVTTL compatible
Includes(0.22uF x 16) decoupling capacitors
4096 refresh cycle every 64ms
Fast-page mode,Read-modify-write,
/CAS before /RAS refresh,Hidden refresh capabilities
Gold plating contact pads
Row Address A0 ~ A11
Column Address A0 ~ A11
APPLICATION
Main memory unit for computers , Microcomputer memory
BACK SIDE
124pin 40pin
125pin 41pin
FRONT SIDE
168pin 84pin
MIT-DS-0124-0.0
MITSUBISHI
ELECTRIC
( 1 / 20 )
26/Feb./1997






MH16V724AWJ-6 Datasheet, Funktion
Preliminary Spec.
Specifications subject to
change without notice.
MITSUBISHI LSIs
MH16V724AWJ -5, -6
FAST PAGE MODE 1207959552 - BIT ( 16777216 - WORD BY 72 - BIT ) DYNAMIC RAM
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Vcc Supply voltage
IO Output current
Pd Power dissipation
Topr
Operating temperature
Tstg
Storage temperature
Conditions
With respect to Vss
Ta=25°C
Ratings
-0.5~ 4.6
50
18
0~70
-40~125
Unit
V
mA
W
°C
°C
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Vcc Supply voltage
Vss Supply voltage
VIH High-level input voltage, all inputs
VIL Low-level input voltage
Note 1 : All voltage values are with respect to Vss
(Ta=0~70°C, unless otherwise noted) (Note 1)
Limits
Min Nom Max
3.0 3.3 3.6
00
0
2.0 Vcc+0.3
-0.3 0.8
Unit
V
V
V
V
ELECTRICAL CHARACTERISTICS (Ta=0~70°C, Vcc=3.3V±0.3V, Vss=0V, unless otherwise noted) (Note 2)
Symbol
Parameter
Test conditions
Limits
Min Typ Max
VOH
High-level output voltage
IOH=-2.0mA
2.4 Vcc
VOL
Low-level output voltage
IOL=2.0mA
0 0.4
IOZ Off-state output current
I I Input current (except /CAS)
Q floating 0V VOUTVcc
-10
0VVINVcc+0.3, Other input pins=0V -180
10
180
I I (CAS) Input current (/CAS)
0VVINVcc+0.3, Other input pins=0V -30
30
Average supply
ICC1 (AV)
current
from Vcc operating
(Note 3,4,5)
-5
-6
/RAS, /CAS cycling
tRC=tWC=min.
output open
2340
2160
ICC2
Supply current from Vcc , stand-by
/RAS=/CAS =VIH, output open
/RAS=/CAS=WEVcc -0.2, output open
18
9
ICC4(AV)
Average supply current
from Vcc
Hyper-Page-Mode
(Note 3,4,5)
-5
-6
/RAS=VIL,/CAS cycling
tPC=min.
output open
1600
1440
ICC6(AV)
Average supply current from
Vcc
/CAS before /RAS refresh
mode
(Note 3,5)
-5
-6
/CAS before /RAS refresh cycling
tRC=min.
output open
2340
2160
Note 2: Current flowing into an IC is positive, out is negative.
3: Icc1 (AV), Icc4 (AV) and Icc6 (AV) are dependent on cycle rate. Maximum current is measured at the fastest cycle rate.
4: Icc1 (AV) and Icc4 (AV) are dependent on output loading. Specified values are obtained with the output open.
5: Under condition of column address being changed once or less while /RAS=VIL and /CAS=VIH
Unit
V
V
uA
uA
uA
mA
mA
mA
mA
CAPACITANCE (Ta = 0~70°C, Vcc = 3.3V±0.3V, Vss = 0V, unless otherwise noted)
Symbol
Parameter
Test conditions
CI (/CAS) Input capacitance, /CAS input
CI Input capacitance, except /CAS input
C(DQ) Input/Output capacitance,DATA
C(SCL) Input capacitance, SPD clock
C(SDA) Input/Output capacitance,SPD DATA
C(SA0~3) Input capacitance, SPD address
VI=Vss
f=1MHZ
Vi=25mVrms
Limits
Min Typ Max
20
140
15
7
7
7
Unit
pF
pF
pF
pF
pF
pF
MIT-DS-0124-0.0
MITSUBISHI
ELECTRIC
( 6 / 20 )
26/Feb./1997

6 Page









MH16V724AWJ-6 pdf, datenblatt
Preliminary Spec.
Specifications subject to
change without notice.
MITSUBISHI LSIs
MH16V724AWJ -5, -6
FAST PAGE MODE 1207959552 - BIT ( 16777216 - WORD BY 72 - BIT ) DYNAMIC RAM
Write Cycle (Delayed write)
RAS
VIH
VIL
CAS
VIH
VIL
Address
VIH
VIL
VIH
W
VIL
DQ
(INPUTS)
VIH
VIL
tWC
tRAS
tRP
tCRP
tRCD
tCSH
tRSH
tCAS
tRPC
tCRP
tASR
tRAH
ROW
ADDRESS
tASC
tRCS
tCAH
COLUMN
ADDRESS
tCWL
tRWL
tWP
tDZC
Hi-Z
tCLZ
tWCH
tDS
tDH
DATA
VALID
tASR
ROW
ADDRESS
DQ
(OUTPUTS)
VOH
VOL
VIH
OE
VIL
Hi-Z
tDZO
tOEZ
tODD
tOEH
Hi-Z
MIT-DS-0124-0.0
MITSUBISHI
ELECTRIC
( 12 / 20 )
26/Feb./1997

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