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PDF MH16S64PHB-10 Data sheet ( Hoja de datos )

Número de pieza MH16S64PHB-10
Descripción 1073741824-BIT (16777216 - WORD BY 64-BIT)SynchronousDRAM
Fabricantes Mitsubishi 
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Preliminary Spec.
Some contents are subject to change without notice.
MITSUBISHI LSIs
MH16S64PHB -7,-8, -10
1073741824-BIT (16777216 - WORD BY 64-BIT)SynchronousDRAM
DESCRIPTION
The MH16S64PHB is 16777216 - word by 64-bit
Synchronous DRAM module. This consists of eight
industry standard 16Mx8 Synchronous DRAMs in
TSOP and one industory standard EEPROM in
TSSOP.
The mounting of TSOP on a card edge Dual Inline
package provides any application where high
densities and large quantities of memory are
required.
This is a socket type - memory modules, suitable for
easy interchange or addition of modules.
FEATURES
Frequency
-7 100MHz
-8 100MHz
CLK Access Time
(Component SDRAM)
6.0ns(CL=3)
6.0ns(CL=3)
-10 100MHz
8.0ns(CL=3)
85pin 1pin
94pin
95pin
10pin
11pin
Utilizes industry standard 16M x 8 Synchronous DRAMs
TSOP and industry standard EEPROM in TSSOP
168-pin (84-pin dual in-line package)
single 3.3V±0.3V power supply
Clock frequency 100MHz
Fully synchronous operation referenced to clock rising
edge
4 bank operation controlled by BA0,1(Bank Address)
/CAS latency- 2/3(programmable)
Burst length- 1/2/4/8/Full Page(programmable)
Burst type- sequential / interleave(programmable)
Column access - random
Auto precharge / All bank precharge controlled by A10
Auto refresh and Self refresh
4096 refresh cycle /64ms
LVTTL Interface
Discrete IC and module design conform to
PC100 specification.
(module Spec. Rev. 1.0 and
SPD 1.2A(-7,-8), SPD 1.0(-10))
124pin 40pin
125pin 41pin
168pin 84pin
APPLICATION
PC main memory
MIT-DS-0297-0.0
MITSUBISHI
ELECTRIC
( 1 / 55 )
11/Jan. /1999

1 page




MH16S64PHB-10 pdf
Preliminary Spec.
Some contents are subject to change without notice.
MITSUBISHI LSIs
MH16S64PHB -7,-8, -10
1073741824-BIT (16777216 - WORD BY 64-BIT)SynchronousDRAM
Serial Presence Detect Table II
31
32
33
34
35
36-61
62
63
Density of each bank on module
Command and Address signal input setup time
Command and Address signal input hold time
-7,-8
-10
-7,-8
-10
Data signal input setup time
-7,-8
-10
Data signal input hold time
-7,-8
-10
Superset Information (may be used in future)
SPD Revision
-7,-8
-10
Checksum for bytes 0-62
64-71
72
Manufactures Jedec ID code per JEP-108E
Manufacturing location
73-90
Manufactures Part Number
91-92
93-94
95-98
99-125
126
127
128+
Revision Code
Manufacturing date
Assembly Serial Number
Manufacture Specific Data
Intetl specification frequency
Intel specification CAS# Latency support
Unused storage locations
-7,-8
-10
-7
-8
-10
128MByte
2ns
N/A
1ns
N/A
2ns
N/A
1ns
N/A
option
rev 1.2A
rev 1
Check sum for -7
Check sum for -8
Check sum for -10
MITSUBISHI
Miyoshi,Japan
Tajima,Japan
NC,USA
Germany
MH16S64PHB-7
MH16S64PHB-8
MH16S64PHB-10
PCB revision
year/week code
serial number
option
100MHz
66MHz
CL=2/3,AP,CK0,2
CL=3,AP,CK0,2
CL=2/3
open
20
20
00
10
00
20
00
10
00
00
12
01
16
56
53
1CFFFFFFFFFFFFFF
01
02
03
04
4D4831365336345048422D37202020202020
4D4831365336345048422D38202020202020
4D4831365336345048422D31302020202020
rrrr
yyww
ssssssss
00
64
66
AF
AD
06
00
MIT-DS-0297-0.0
MITSUBISHI
ELECTRIC
( 5 / 55 )
11/Jan. /1999

5 Page





MH16S64PHB-10 arduino
Preliminary Spec.
Some contents are subject to change without notice.
MITSUBISHI LSIs
MH16S64PHB -7,-8, -10
1073741824-BIT (16777216 - WORD BY 64-BIT)SynchronousDRAM
FUNCTION TRUTH TABLE(continued)
Current State
PRE -
CHARGING
ROW
ACTIVATING
WRITE RE-
COVERING
/S /RAS /CAS /WE Address
Command
Action
H X X XX
DESEL NOP(Idle after tRP)
L H H HX
NOP
NOP(Idle after tRP)
L H H L BA
TBST
ILLEGAL*2
L H L X BA,CA,A10 READ/WRITE ILLEGAL*2
L L H H BA,RA
ACT
ILLEGAL*2
L L H L BA,A10
PRE/PREA NOP*4(Idle after tRP)
L L L HX
REFA
ILLEGAL
Op-Code,
LLLL
Mode-Add
MRS
ILLEGAL
H X X XX
DESEL NOP(Row Active after tRCD
L H H HX
NOP
NOP(Row Active after tRCD
L H H L BA
TBST
ILLEGAL*2
L H L X BA,CA,A10 READ/WRITE ILLEGAL*2
L L H H BA,RA
ACT
ILLEGAL*2
L L H L BA,A10
PRE/PREA ILLEGAL*2
L L L HX
REFA
ILLEGAL
Op-Code,
LLLL
Mode-Add
MRS
ILLEGAL
H X X XX
DESEL NOP
L H H HX
NOP
NOP
L H H L BA
TBST
ILLEGAL*2
L H L X BA,CA,A10 READ/WRITE ILLEGAL*2
L L H H BA,RA
ACT
ILLEGAL*2
L L H L BA,A10
PRE/PREA ILLEGAL*2
L L L HX
REFA
ILLEGAL
Op-Code,
LLLL
Mode-Add
MRS
ILLEGAL
MIT-DS-0297-0.0
MITSUBISHI
ELECTRIC
( 11 / 55 )
11/Jan. /1999

11 Page







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