PDF M61540FP Data sheet ( Hoja de datos )

Número de pieza	M61540FP
Descripción	6ch Electronic Volume with 5 Input Selector
Fabricantes	Hitachi
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No Preview Available ! Preliminary M61540FP 6ch Electronic Volume with 5 Input Selector REJ03F0117-0100Z Rev.1.0 May.31.2004 Description M61540FP is an audio signal processor for home audio. This IC contains 6 channel electronic volume, gain control, input selector and 2 band tone control. Features • Electric Volume • Gain Control • Input Selector • Multi Channel Input • Tone Control • REC Output • ADC Out 6 channel independent Electronic Volume with High Voltage Transistor. (0 to –99dB/1dBstep, –∞dB) 6 channel independent Gain Control (0, 6, 12, 18dB) L/R channel 5 Input Selector 6 channel Input Bass: –14 to + 14dB(2dB step), Treble: –14 to + 14dB(2dB step) Can use 2 Input for REC Output Built-in ADC out Recommended Operating Condition Supply Voltage Range AVCC = 7.0V(typ), AVEE = –7.0V(typ), DVDD = 3.0 to 5.5V System Block Diagram REC OUT (4) (5) Multi Multi Rin Lin Lch Tone RchTone CLOCK DATA 1 Lch 2 3 Volume Volume Tone Bass& Treble Bass& Treble MCU I/F Gain Control Lout Gain Control Rout 1 Rch 2 3 Input ATT Input ATT Multi Out L Cin for ADC Multi SWin Out R Multi for SLin ADC Multi SRin Volume Volume Volume Volume Gain Control Gain Control Gain Control Gain Control Cout SWout SLout SRout GND (4) (5) REC OUT VOL GND DGND DVDD AVEE AVCC Rev.1.0, May.31.2004, page 1 of 16 1 page M61540FP Relationship Between Data and Clock Data signal is read at the rising edge of CLOCK. DATA D0 D1 D2 D3 Preliminary Make "H" at the timing which DATA of D0-D23 make latch. D21 D22 D23 CLOCK Clock and Data Timings DATA 75% 25% (D0 to D23) t cr tSLD tHLD tSHD tHHD 75% 50% 25% CLOCK tr tf tWHC tWLC Timing Definition of Digital Block Parameter CLOCK cycle time CLOCK pulse width ("H" level) CLOCK pulse width ("L" level) Rising time of clock and data Falling time of clock and data DATA setup time (Rising time of clock) DATA setup time (Falling time of clock) DATA hold time ("H" level) DATA hold time ("L" level) CLOCK setup time Symbol tcr tWHC tWLC tr tf tSHD tSLD tHHD tHLD tSC When DATA is "H", latch signal is created at the falling edge of CLOCK. LATCH tSLD tHLD tSC Limits Min Typ Max Unit 8  3.2   3.2     0.8 µs   0.8 1.6   1.6   1.6   1.6   1.6   Rev.1.0, May.31.2004, page 5 of 16 5 Page M61540FP Lch D2b D3b D4b Rch D11b D12b D13b Cch D2c D3c D4c ATT SWch D11c D12c D13c SLch D2d D3d D4d SRch D11d D12d D13d –85dB 1 0 1 –86dB 1 0 1 –87dB 1 0 1 –88dB 1 0 1 –89dB 1 0 1 –90dB 1 0 1 –91dB 1 0 1 –92dB 1 0 1 –93dB 1 0 1 –94dB 1 0 1 –95dB 1 0 1 –96dB 1 1 0 –97dB 1 1 0 –98dB 1 1 0 –99dB 1 1 0 –∞dB 1 1 1/0 Note: No guarantee except for these codes. D5b D14b D5c D14c D5d D14d 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 1/0 D6b D15b D6c D15c D6d D15d 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 D7b D16b D7c D16c D7d D16d 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 1/0 D8b D17b D8c D17c D8d D17d 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 1/0 Preliminary Electrical Characteristics Unless otherwise noted, Ta = 25°C, AVCC = 7V, AVEE = –7V, DVDD = 5V, f = 1kHz, Volume = 0dB, Input Selector = IN1, Gain Control = 0dB, ADC Input ATT = 0dB, Tone = Bypass (1) Power supply characteristics Parameter Analog positive power circuit current Analog negative power circuit current Digital power circuit current Symbol AIcc AIee DIdd Limits Min Typ Max Unit Test condition  32 42 mA With AVCC = 7V and AVEE = –7V 38pin current, when no signal is provided –42 –32  mA With AVCC = 7V and AVEE = –7V 37pin current, when no signal is provided  2 3 mA With DVDD = 3.3V, 13pin current, when no signal is provided Rev.1.0, May.31.2004, page 11 of 16 11 Page

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