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PDF MC14194BCP Data sheet ( Hoja de datos )

Número de pieza MC14194BCP
Descripción 4-Bit Bidirectional Universal Shift Register
Fabricantes Motorola Semiconductors 
Logotipo Motorola Semiconductors Logotipo



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No Preview Available ! MC14194BCP Hoja de datos, Descripción, Manual

MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
MC14194B
4-Bit Bidirectional Universal
Shift Register
The MC14194B is a 4–bit static shift register capable of operating in the
parallel load, serial shift left, serial shift right, or hold mode. The
asynchronous Reset input, when at a low level, overrides all other inputs,
resets all stages, and forces all outputs low. When Reset is at a logic 1 level,
the two mode control inputs, S0 and S1, control the operating mode as
shown in the truth table. Both serial and parallel operation are triggered on
the positive–going transition of the Clock input. The Parallel Data, Data Shift,
and mode control inputs must be stable for the specified setup and hold
times before and after the positive–going Clock transition.
Synchronous Right/Left Serial Operation
Synchronous Parallel Load
Asynchronous Hold (Do Nothing) Mode
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎFunctional Pin for Pin Equivalent of LS194
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎMAXIMUM RATINGS* (Voltages Referenced to VSS)
Symbol
Parameter
Value
Unit
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎVDD DCSupplyVoltage
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎVin, Vout Input or Output Voltage (DC or Transient)
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎIin, Iout Input or Output Current (DC or Transient),
per Pin
– 0.5 to + 18.0
– 0.5 to VDD + 0.5
± 10
V
V
mA
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎPD Power Dissipation, per Package†
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎTstg Storage Temperature
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎTL Lead Temperature(8–SecondSoldering)
500
– 65 to + 150
260
mW
_C
_C
* Maximum Ratings are those values beyond which damage to the device may occur.
†Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_C
Ceramic “L” Packages: – 12 mW/_C From 100_C To 125_C
L SUFFIX
CERAMIC
CASE 620
P SUFFIX
PLASTIC
CASE 648
D SUFFIX
SOIC
CASE 751B
ORDERING INFORMATION
MC14XXXBCP
MC14XXXBCL
MC14XXXBD
Plastic
Ceramic
SOIC
TA = – 55° to 125°C for all packages.
S1 10
S0 9
3
DP0
LOGIC DIAGRAM
4
DP1
5
DP2
6
DP3
DSR 2
7
DSL
VDD = PIN 16
VSS = PIN 8
CLOCK 11
RESET 1
REV 3
1/94
©MMCot1or4o1la9, I4nBc. 1995
284
DQ
CR
Q0
15
DQ
CR
Q1
14
DQ
CR
Q2
13
DQ
CR
Q3
12
MOTOROLA CMOS LOGIC DATA

1 page




MC14194BCP pdf
OUTLINE DIMENSIONS
L SUFFIX
CERAMIC DIP PACKAGE
CASE 620–10
ISSUE V
–A–
16 9
–B–
18
CL
–T–
SEATING
PLANE
F
NK
E
G
D 16 PL
0.25 (0.010) M T A S
M
J 16 PL
0.25 (0.010) M T B S
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL.
4. DIMENSION F MAY NARROW TO 0.76 (0.030)
WHERE THE LEAD ENTERS THE CERAMIC
BODY.
INCHES
MILLIMETERS
DIM MIN MAX MIN MAX
A 0.750 0.785 19.05 19.93
B 0.240 0.295 6.10 7.49
C ––– 0.200 ––– 5.08
D 0.015 0.020 0.39 0.50
E 0.050 BSC
1.27 BSC
F 0.055 0.065 1.40 1.65
G 0.100 BSC
2.54 BSC
H 0.008 0.015 0.21 0.38
K 0.125 0.170 3.18 4.31
L 0.300 BSC
7.62 BSC
M 0_ 15_ 0_ 15_
N 0.020 0.040 0.51 1.01
–A–
16
1
H
G
P SUFFIX
PLASTIC DIP PACKAGE
CASE 648–08
ISSUE R
9
B
8
FC
S
L
–T–
SEATING
PLANE
KJ
D 16 PL
0.25 (0.010) M T A M
M
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.
5. ROUNDED CORNERS OPTIONAL.
INCHES
MILLIMETERS
DIM MIN MAX MIN MAX
A 0.740 0.770 18.80 19.55
B 0.250 0.270 6.35 6.85
C 0.145 0.175 3.69 4.44
D 0.015 0.021 0.39 0.53
F 0.040 0.70 1.02 1.77
G 0.100 BSC
2.54 BSC
H 0.050 BSC
1.27 BSC
J 0.008 0.015 0.21 0.38
K 0.110 0.130 2.80 3.30
L 0.295 0.305 7.50 7.74
M 0_ 10_ 0_ 10 _
S 0.020 0.040 0.51 1.01
MC14194B
288
MOTOROLA CMOS LOGIC DATA

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