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PDF MC14093BDR2 Data sheet ( Hoja de datos )
| Número de pieza | MC14093BDR2 | |
| Descripción | Quad 2-Input NAND Schmitt Trigger | |
| Fabricantes | ON Semiconductor | |
| Logotipo |  |
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MC14093B
Quad 2-Input NAND"
Schmitt Trigger
The MC14093B Schmitt trigger is constructed with MOS
P–channel and N–channel enhancement mode devices in a single
monolithic structure. These devices find primary use where low power
dissipation and/or high noise immunity is desired. The MC14093B
may be used in place of the MC14011B quad 2–input NAND gate for
enhanced noise immunity or to “square up” slowly changing
waveforms.
• Supply Voltage Range = 3.0 Vdc to 18 Vdc
• Capable of Driving Two Low–Power TTL Loads or One Low–Power
Schottky TTL Load Over the Rated Temperature Range
• Triple Diode Protection on All Inputs
• Pin–for–Pin Compatible with CD4093
• Can be Used to Replace MC14011B
• Independent Schmitt–Trigger at each Input
MAXIMUM RATINGS (Voltages Referenced to VSS) (Note 2.)
Symbol
Parameter
Value
VDD
Vin, Vout
DC Supply Voltage Range
Input or Output Voltage Range
(DC or Transient)
– 0.5 to +18.0
– 0.5 to VDD + 0.5
Iin, Iout
Input or Output Current
(DC or Transient) per Pin
± 10
Unit
V
V
mA
PD Power Dissipation,
per Package (Note 3.)
500 mW
TA Ambient Temperature Range
Tstg Storage Temperature Range
TL Lead Temperature
(8–Second Soldering)
– 55 to +125
– 65 to +150
260
°C
°C
°C
2. Maximum Ratings are those values beyond which damage to the device
may occur.
3. Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
v vhigh–impedance circuit. For proper operation, Vin and Vout should be constrained
to the range VSS (Vin or Vout) VDD.
Unused inputs must always be tied to an appropriate logic voltage level (e.g.,
either VSS or VDD). Unused outputs must be left open.
http://onsemi.com
PDIP–14
P SUFFIX
CASE 646
SOIC–14
D SUFFIX
CASE 751A
TSSOP–14
DT SUFFIX
CASE 948G
MARKING
DIAGRAMS
14
MC14093BCP
AWLYYWW
1
14
14093B
AWLYWW
1
14
14
093B
ALYW
SOEIAJ–14
F SUFFIX
CASE 965
1
14
MC14093B
AWLYWW
1
A = Assembly Location
WL or L = Wafer Lot
YY or Y = Year
WW or W = Work Week
ORDERING INFORMATION
Device
Package
Shipping
MC14093BCP
PDIP–14
2000/Box
MC14093BD
SOIC–14
2750/Box
MC14093BDR2 SOIC–14 2500/Tape & Reel
MC14093BDT
TSSOP–14
96/Rail
MC14093BDTEL TSSOP–14 2000/Tape & Reel
MC14093BDTR2 TSSOP–14 2500/Tape & Reel
MC14093BF
SOEIAJ–14 See Note 1.
MC14093BFEL SOEIAJ–14 See Note 1.
1. For ordering information on the EIAJ version of
the SOIC packages, please contact your local
ON Semiconductor representative.
© Semiconductor Components Industries, LLC, 2000
March, 2000 – Rev. 3
1
Publication Order Number:
MC14093B/D
1 page  
MC14093B
14 IOH
All unused inputs
connected to ground.
7
VGS
0
– 2.0 VGS = – 5.0 Vdc
a TA = – 55°C
– 4.0
b TA = + 25°C
b TA = + 125°C
c
b
a
c
– 6.0
– 10 Vdc b c b
– 8.0
Vout
– 15 Vdc
– 10
– 10
aa
– 8.0 – 6.0 – 4.0 – 2.0
VDS, DRAIN VOLTAGE (Vdc)
Figure 3. Typical Output Source
Characteristics Test Circuit
0
VGS
All unused inputs
connected to ground.
14 IOL
7
Vout
10
a bc
15 Vdc
a
8.0 b VGS = 10 Vdc
6.0 c
4.0
a TA = – 55°C
b TA = + 25°C
c TA = + 125°C
a
2.0 b 5.0 Vdc
c
0
0 2.0 4.0 6.0 8.0 10
VDS, DRAIN VOLTAGE (Vdc)
Figure 4. Typical Output Sink
Characteristics Test Circuit
VDD
0
0 VT– VT+
VDD
VH
Vin, INPUT VOLTAGE (Vdc)
Figure 5. Typical Transfer Characteristics
http://onsemi.com
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