MC14001UBD Datasheet PDF - ON Semiconductor
| Part Number | MC14001UBD | |
| Description | UB-Suffix Series CMOS Gates | |
| Manufacturers | ON Semiconductor | |
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MC14001UB, MC14011UB
UB-Suffix Series
CMOS Gates
The UB Series logic gates are constructed with P and N channel
enhancement mode devices in a single monolithic structure
(Complementary MOS). Their primary use is where low power
dissipation and/or high noise immunity is desired. The UB set of
CMOS gates are inverting non–buffered functions.
• Supply Voltage Range = 3.0 Vdc to 18 Vdc
• Linear and Oscillator Applications
• Capable of Driving Two Low–power TTL Loads or One Low–power
Schottky TTL Load Over the Rated Temperature Range
• Double Diode Protection on All Inputs
• Pin–for–Pin Replacements for Corresponding CD4000 Series UB
Suffix Devices
MAXIMUM RATINGS (Voltages Referenced to VSS) (Note 1.)
Symbol
Parameter
Value
VDD
Vin, Vout
DC Supply Voltage Range
Input or Output Voltage Range
(DC or Transient)
– 0.5 to +18.0
– 0.5 to VDD + 0.5
Unit
V
V
Iin, Iout
Input or Output Current
(DC or Transient) per Pin
± 10 mA
PD Power Dissipation,
per Package (Note 2.)
500 mW
TA Ambient Temperature Range
Tstg Storage Temperature Range
TL Lead Temperature
(8–Second Soldering)
– 55 to +125
– 65 to +150
260
°C
°C
°C
1. Maximum Ratings are those values beyond which damage to the device
may occur.
2. Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
v vhigh–impedance circuit. For proper operation, Vin and Vout should be constrained
to the range VSS (Vin or Vout) VDD.
Unused inputs must always be tied to an appropriate logic voltage level (e.g.,
either VSS or VDD). Unused outputs must be left open.
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MC14001UB
Quad 2–Input NOR Gate
MC14011UB
Quad 2–Input NAND Gate
PDIP–14
P SUFFIX
CASE 646
MARKING
DIAGRAMS
14
MC140XXUBCP
AWLYYWW
1
SOIC–14
D SUFFIX
CASE 751A
14
140XXU
AWLYWW
1
XX = Specific Device Code
A = Assembly Location
WL or L = Wafer Lot
YY or Y = Year
WW or W = Work Week
ORDERING INFORMATION
Device
Package
Shipping
MC14001UBCP PDIP–14
2000/Box
MC14001UBD
SOIC–14
55/Rail
MC14001UBDR2 SOIC–14 2500/Tape & Reel
MC14011UBCP PDIP–14
2000/Box
MC14011UBD
SOIC–14
55/Rail
MC14011UBDR2 SOIC–14 2500/Tape & Reel
© Semiconductor Components Industries, LLC, 2000
March, 2000 – Rev. 3
1
Publication Order Number:
MC14001UB/D
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MC14001UB, MC14011UB
MC14001UB CIRCUIT SCHEMATIC
VDD
3 14 10
18
29
6 13
5 12
MC14011UB CIRCUIT SCHEMATIC
(1/4 of Device Shown)
14 VDD
1, 6, 8, 13
2, 5, 9, 12
3, 4, 10, 11
7 VSS
4 7 11
VSS
16 VDD = 15 Vdc TA = + 25°C
14 Unused input
connected to
12
10 10 Vdc
VSS.
a One input only
b Both inputs
8.0 8.0
ba
6.0 5.0 Vdc
15 Vdc
6.0
4.0 b a
4.0
ba
10 Vdc
2.0 2.0
00
0 2.0 4.0 6.0 8.0 10 12 14 16
Vin, INPUT VOLTAGE (Vdc)
Figure 2. Typical Voltage and
Current Transfer Characteristics
0
c
– 2.0
VGS = – 5.0 Vdc b
a
a TA = – 55°C
– 4.0
b TA = + 25°C
c TA = + 125°C
c
– 6.0
– 10 Vdc
b
– 8.0 c
b
– 15 Vdc
– 10
– 10
aa
– 8.0 – 6.0 – 4.0 – 2.0
VDS, DRAIN VOLTAGE (Vdc)
Figure 4. Typical Output Source
Characteristics
0
16 VDD = 15 Vdc Unused input
14
b
a
connected to
VSS.
12
10 Vdc
10
8.0
ab
6.0 5.0 Vdc
a TA = + 125°C
b TA = – 55°C
4.0
ab
2.0
0
0 2.0 4.0 6.0 8.0 10 12 14 16
Vin, INPUT VOLTAGE (Vdc)
Figure 3. Typical Voltage Transfer
Characteristics versus
Temperature
10
a
15 Vdc
8.0
ca
b
b
VGS = 10 Vdc
c
6.0
4.0
a TA = – 55°C
b TA = + 25°C
c TA = + 125°C
a
2.0
b 5.0 Vdc
c
0
0 2.0 4.0 6.0 8.0 10
VDS, DRAIN VOLTAGE (Vdc)
Figure 5. Typical Output Sink
Characteristics
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Part DetailsOn this page, you can learn information such as the schematic, equivalent, pinout, replacement, circuit, and manual for MC14001UBD electronic component. |
| Information | Total 8 Pages | |
| Link URL | [ Copy URL to Clipboard ] | |
| Download | [ MC14001UBD.PDF Datasheet ] | |
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