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Número de pieza | MC10131 | |
Descripción | Dual TYPE D Master-Slave Flip-Flop | |
Fabricantes | ON Semiconductor | |
Logotipo | ||
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No Preview Available ! MC10131
Dual Type D Master-Slave
Flip-Flop
The MC10131 is a dual master–slave type D flip–flop.
Asynchronous Set (S) and Reset (R) override Clock (CC) and Clock
Enable (CE) inputs. Each flip–flop may be clocked separately by
holding the common clock in the low state and using the enable inputs
for the clocking function. If the common clock is to be used to clock
the flip–flop, the Clock Enable inputs must be in the low state. In this
case, the enable inputs perform the function of controlling the
common clock.
The output states of the flip–flop change on the positive transition of
the clock. A change in the information present at the data (D) input
will not affect the output information at any other time due to master
slave construction.
• PD = 235 mW typ/pkg (No Load)
• FTog = 160 MHz typ
• tpd = 3.0 ns typ
• tr, tf = 2.5 ns typ (20%–80%)
DIP PIN ASSIGNMENT
VCC1
Q1
Q1
R1
S1
CE1
D1
VEE
1
2
3
4
5
6
7
8
16 VCC2
15 Q2
14 Q2 www.DataSheet4U.com
13 R2
12 S2
11 CE2
10 D2
9 CC
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion Tables on page 18
of the ON Semiconductor MECL Data Book (DL122/D).
LOGIC DIAGRAM
S1 5
D1 7
CE1 6
Q1 2
Q1 3
R1 4
CC 9
R2 13
CE2 11
D2 10
Q2 14
Q2 15
S2 12
VCC1 = PIN 1
VCC2 = PIN 16
VEE = PIN 8
© Semiconductor Components Industries, LLC, 2002
January, 2002 – Rev. 7
1
http://onsemi.com
CDIP–16
L SUFFIX
CASE 620
PDIP–16
P SUFFIX
CASE 648
MARKING
DIAGRAMS
16
MC10131L
AWLYYWW
1
16
MC10131P
AWLYYWW
1
1
PLCC–20
FN SUFFIX
CASE 775
10131
AWLYYWW
A = Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
CLOCKED TRUTH TABLE
C D Qn+1
LX
Qn
HL
L
HH
H
C = CE + CC.A clock H is a clock transition from a low to a
high state.
R–S TRUTH TABLE
R S Qn+1
LL
LH
Qn
H
HL
L
H H N.D.
N.D. = Not Defined
ORDERING INFORMATION
Device
Package
Shipping
MC10131L
CDIP–16
25 Units / Rail
MC10131P
PDIP–16
25 Units / Rail
MC10131FN
PLCC–20
46 Units / Rail
Publication Order Number:
MC10131/D
1 page MC10131
PACKAGE DIMENSIONS
CDIP–16
–A– L SUFFIX
CERAMIC DIP PACKAGE
CASE 620–10
16 9 ISSUE T
–B–
18
CL
–T–
SEATING
PLANE
F
NK
E
G
D 16 PL
0.25 (0.010) M T A S
M
J 16 PL
0.25 (0.010) M T B S
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL.
4. DIMENSION F MAY NARROW TO 0.76 (0.030)
WHERE THE LEAD ENTERS THE CERAMIC
BODY.
INCHES
MILLIMETERS
DIM MIN MAX MIN MAX
A 0.750 0.785 19.05 19.93
B 0.240 0.295 6.10 7.49
C --- 0.200 --- 5.08
D 0.015 0.020 0.39 0.50
E 0.050 BSC
1.27 BSC
F 0.055 0.065 1.40 1.65
G 0.100 BSC
2.54 BSC
H 0.008 0.015 0.21 0.38
K 0.125 0.170 3.18 4.31
L 0.300 BSC
7.62 BSC
M 0_ 15_ 0_ 15_
N 0.020 0.040 0.51 1.01
–A–
16
1
H
G
9
B
8
PDIP–16
P SUFFIX
PLASTIC DIP PACKAGE
CASE 648–08
ISSUE R
FC
S
L
–T–
SEATING
PLANE
KJ
D 16 PL
0.25 (0.010) M T A M
M
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.
5. ROUNDED CORNERS OPTIONAL.
INCHES
MILLIMETERS
DIM MIN MAX MIN MAX
A 0.740 0.770 18.80 19.55
B 0.250 0.270 6.35 6.85
C 0.145 0.175 3.69 4.44
D 0.015 0.021 0.39 0.53
F 0.040 0.70 1.02 1.77
G 0.100 BSC
2.54 BSC
H 0.050 BSC
1.27 BSC
J 0.008 0.015 0.21 0.38
K 0.110 0.130 2.80 3.30
L 0.295 0.305 7.50 7.74
M 0_ 10_ 0 _ 10 _
S 0.020 0.040 0.51 1.01
http://onsemi.com
5
5 Page |
Páginas | Total 8 Páginas | |
PDF Descargar | [ Datasheet MC10131.PDF ] |
Número de pieza | Descripción | Fabricantes |
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MC10131 | Dual TYPE D Master-Slave Flip-Flop | ON Semiconductor |
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MC10131L | Dual Type D Master-Slave Flip-Flop | Motorola Semiconductors |
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