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PDF MC100LVEL30 Data sheet ( Hoja de datos )
| Número de pieza | MC100LVEL30 | |
| Descripción | Triple D Flip-Flop | |
| Fabricantes | ON Semiconductor | |
| Logotipo |  |
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MC100LVEL30
3.3 V ECL Triple D Flip‐Flop
with Set and Reset
Description
The MC100LVEL30 is a triple master-slave D flip-flop with
differential outputs. Data enters the master latch when the clock input
is LOW and transfers to the slave upon a positive transition on the
clock input.
In addition to a common Set input individual Reset inputs are
provided for each flip-flop. Both the Set and Reset inputs function
asynchronous and overriding with respect to the clock inputs.
Features
• 1200 MHz Minimum Toggle Frequency
• 450 ps Typical Propagation Delays
• ESD Protection: > 2 kV Human Body Model
• The 100 Series Contains Temperature Compensation.
• PECL Mode Operating Range:
VCC = 3.0 V to 3.8 V with VEE = 0 V
• NECL Mode Operating Range:
VCC = 0 V with VEE = −3.0 V to −3.8 V
• Internal Input 75 kW Pulldown Resistors
• Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
• Moisture Sensitivity: Level 3 (Pb-Free)
(For Additional Information, see Application Note AND8003/D)
• Flammability Rating: UL 94 V−0 @ 0.125 in,
Oxygen Index: 28 to 34
• Transistor Count = 347 Devices
• These Devices are Pb-Free, Halogen Free and are RoHS Compliant
www.onsemi.com
SOIC−20 WB
DW SUFFIX
CASE 751D−05
MARKING DIAGRAM*
20
100LVEL30
AWLYYWWG
1
A = Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
G = Pb-Free Package
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
Device
Package
Shipping†
MC100LVEL30DWG
SOIC−20 WB 38 Units / Tube
(Pb-Free)
MC100LVEL30DWR2G SOIC−20 WB 1000 Tape & Reel
(Pb-Free)
†For information on tape and reel specifications, in-
cluding part orientation and tape sizes, please refer
to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2016
July, 2016 − Rev. 8
1
Publication Order Number:
MC100LVEL30/D
1 page  
MC100LVEL30
PACKAGE DIMENSIONS
SOIC−20 WB
DW SUFFIX
CASE 751D−05
ISSUE H
DA
q
20 11
E
1 10
20X b
B
0.25 M T A S B S
18X e
A
SEATING
A1
PLANE
T
c
NOTES:
1. DIMENSIONS ARE IN MILLIMETERS.
2. INTERPRET DIMENSIONS AND TOLERANCES
PER ASME Y14.5M, 1994.
3. DIMENSIONS D AND E DO NOT INCLUDE MOLD
PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE.
5. DIMENSION B DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE PROTRUSION
SHALL BE 0.13 TOTAL IN EXCESS OF B
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
MILLIMETERS
DIM MIN MAX
A 2.35 2.65
A1 0.10 0.25
b 0.35 0.49
c 0.23 0.32
D 12.65 12.95
E 7.40 7.60
e 1.27 BSC
H 10.05 10.55
h 0.25 0.75
L 0.50 0.90
q 0_ 7_
RECOMMENDED
SOLDERING FOOTPRINT*
02.05X2
20X
1.30
20 11
11.00
1 10
1.27
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb-Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
www.onsemi.com
5
5 Page | ||
| Páginas | Total 6 Páginas | |
| PDF Descargar | [ Datasheet MC100LVEL30.PDF ] | |
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