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PDF MC100ELT24 Data sheet ( Hoja de datos )

Número de pieza MC100ELT24
Descripción TTL to Differential ECL Translator
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MC10ELT24, MC100ELT24
5V TTL to Differential
ECL Translator
Description
The MC10ELT/100ELT24 is a TTL to differential ECL translator.
Because ECL levels are used a +5 V, −5.2 V (or −4.5 V) and ground
are required. The small outline 8−lead package and the single gate of
the ELT24 makes it ideal for those applications where space,
performance and low power are at a premium.
The 100 Series contains temperature compensation.
Features
0.8 ns tPHL, 0.95 ns tPLH Typical Propagation Delay
PNP TTL Inputs for Minimal Loading
Flow Through Pinouts
Operating Range: VCC = 4.5 V to 5.5 V; VEE = −4.2 V to −5.5 V with
GND = 0 V
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
www.onsemi.com
8
1
SOIC−8
D SUFFIX
CASE 751
MARKING DIAGRAMS*
8
HLT24
ALYW
G
1
8
KLT24
ALYW
G
1
8
1
TSSOP−8
DT SUFFIX
CASE 948R
8
HT24
ALYWG
G
1
8
KT24
ALYWG
G
1
DFN8
MN SUFFIX
CASE 506AA
14
14
H = MC10
A = Assembly Location
K = MC100
L = Wafer Lot
5E = MC10
Y = Year
2T = MC100
W = Work Week
M = Date Code G = Pb−Free Package
(Note: Microdot may be in either location)
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
© Semiconductor Components Industries, LLC, 2015
August, 2015 − Rev. 11
1
Publication Order Number:
MC10ELT24/D

1 page




MC100ELT24 pdf
MC10ELT24, MC100ELT24
ORDERING INFORMATION
Device
MC10ELT24DG
Package
SOIC−8
(Pb−Free)
Shipping
98 Units / Rail
MC10ELT24DR2G
SOIC−8
(Pb−Free)
2500 / Tape & Reel
MC10ELT24DTG
TSSOP−8
(Pb−Free)
100 Units / Rail
MC10ELT24DTR2G
TSSOP−8
(Pb−Free)
2500 / Tape & Reel
MC10ELT24MNR4G
DFN8
(Pb−Free)
1000 / Tape & Reel
MC100ELT24DG
SOIC−8
(Pb−Free)
98 Units / Rail
MC100ELT24DR2G
SOIC−8
(Pb−Free)
2500 / Tape & Reel
MC100ELT24DTG
TSSOP−8
(Pb−Free)
100 Units / Rail
MC100ELT24DTR2G
TSSOP−8
(Pb−Free)
2500 / Tape & Reel
MC100ELT24MNR4G
DFN8
(Pb−Free)
1000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
Resource Reference of Application Notes
AN1405/D − ECL Clock Distribution Techniques
AN1406/D − Designing with PECL (ECL at +5.0 V)
AN1503/D − ECLinPSt I/O SPiCE Modeling Kit
AN1504/D − Metastability and the ECLinPS Family
AN1568/D − Interfacing Between LVDS and ECL
AN1672/D − The ECL Translator Guide
AND8001/D − Odd Number Counters Design
AND8002/D − Marking and Date Codes
AND8020/D − Termination of ECL Logic Devices
AND8066/D − Interfacing with ECLinPS
AND8090/D − AC Characteristics of ECL Devices
www.onsemi.com
5

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