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PDF MC100E141 Data sheet ( Hoja de datos )
| Número de pieza | MC100E141 | |
| Descripción | 8-BIT SHIFT REGISTER | |
| Fabricantes | ON Semiconductor | |
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MC10E141, MC100E141
5V ECL 8-Bit Shift Register
Description
The MC10E/100E141 is an 8-bit full-function shift register. The
E141 performs serial/parallel in and serial/parallel out, shifting in
either direction. The eight inputs D0 − D7 accept parallel input data,
while DL/DR accept serial input data for left/right shifting. The Qn
outputs do not need to be terminated for the shift operation to function.
To minimize noise and power, any Q output not used should be left
unterminated.
The select pins, SEL0 and SEL1, select one of four modes of
operation: Load, Hold, Shift Left, Shift Right, according to the
Function Table.
Input data is accepted a set-up time before the positive clock edge. A
HIGH on the Master Reset (MR) pin asynchronously resets all the
registers to zero.
The 100 Series contains temperature compensation.
Features
• 700 MHz Min. Shift Frequency
• 8-Bit
• Full-Function, Bi-Directional
• Asynchronous Master Reset
• Pin-Compatible with E241
• PECL Mode Operating Range: VCC = 4.2 V to 5.7 V
with VEE = 0 V
• NECL Mode Operating Range: VCC = 0 V
with VEE = −4.2 V to −5.7 V
• Internal Input 50 kW Pulldown Resistors
• ESD Protection: Human Body Model; > 2 kV,
Machine Model; > 200 V
• Meets or Exceeds JEDEC Standard EIA/JESD78 IC Latchup Test
• Moisture Sensitivity Level:
Pb = 1
Pb−Free = 3
For Additional Information, see Application Note AND8003/D
• Flammability Rating: UL 94 V−0 @ 0.125 in,
Oxygen Index: 28 to 34
• Transistor Count = 565 devices
• Pb−Free Packages are Available*
http://onsemi.com
PLCC−28
FN SUFFIX
CASE 776
MARKING DIAGRAM*
1
MCxxxE141FNG
AWLYYWW
xxx = 10 or 100
A = Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
G = Pb−Free Package
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2006
November, 2006 − Rev. 7
1
Publication Order Number:
MC10E141/D
1 page  
MC10E141, MC100E141
Table 9. AC CHARACTERISTICS VCCx = 5.0 V; VEE = 0.0 V or VCCx = 0.0 V; VEE = −5.0 V (Note 9)
0°C 25°C
85°C
Symbol
Characteristic
Min Typ Max Min Typ Max Min Typ Max Unit
fSHIFT
tPLHt
PHL
Max. Shift Frequency
Propagation Delay To Output
700 900
700 900
700 900
MHz
Clk 625 750 975 625 750 975 625 750 975
MR 600 725 975 600 725 975 600 725 975
ps
ts Setup Time
D
SEL0
SEL1
175
350
300
25
200
150
175 25
350 200
300 150
175 25
350 200
300 150
ps
th Hold Time
D 200 − 25
SEL0 100 − 200
SEL1 100 −150
200 − 25
100 − 200
100 −150
200 − 25
100 − 200
100 −150
ps
tRR Reset Recovery Time
tPW Minimum Pulse Width
900 700
Clk, MR 400
900 700
400
900 700
400
ps
ps
tSKEW
tJITTER
tr
tf
Within-Device Skew (Note 10)
Random Clock Jitter (RMS)
Rise/Fall Times
(20 - 80%)
60 60 60
<1 <1 <1
300 525 800 300 525 800 300 525 800
ps
ps
ps
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
9. 10 Series: VEE can vary −0.46 V / +0.06 V.
100 Series: VEE can vary −0.46 V / +0.8 V.
10. Within-device skew is defined as identical transitions on similar paths through a device.
http://onsemi.com
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| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet MC100E141.PDF ] | |
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