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Teilenummer | MC-4516CD641ES-A80 |
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Beschreibung | 16M-WORD BY 64-BIT SYNCHRONOUS DYNAMIC RAM MODULE SO DIMM | |
Hersteller | NEC | |
Logo | ||
Gesamt 16 Seiten DATA SHEET
MOS INTEGRATED CIRCUIT
MC-4516CD641ES, 4516CD641PS
16M-WORD BY 64-BIT
SYNCHRONOUS DYNAMIC RAM MODULE (SO DIMM)
Description
The MC-4516CD641ES and MC-4516CD641PS are 16,777,216 words by 64 bits synchronous dynamic RAM
module (Small Outline DIMM) on which 8 pieces of 128M SDRAM: µPD45128163 are assembled.
These modules provide high density and large quantities of memory in a small space without utilizing the surface-
mounting technology on the printed circuit board.
Decoupling capacitors are mounted on power supply line for noise reduction.
Features
• 16,777,216 words by 64 bits organization
• Clock frequency and access time from CLK
Part number
/CAS latency
Clock frequency (MAX.) Access time from CLK (MAX.)
MC-4516CD641ES-A80
MC-4516CD641ES-A10
5 MC-4516CD641PS-A80
5 MC-4516CD641PS-A10
CL = 3
CL = 2
CL = 3
CL = 2
CL = 3
CL = 2
CL = 3
CL = 2
125 MHz
100 MHz
100 MHz
77 MHz
125 MHz
100 MHz
100 MHz
77 MHz
6 ns
6 ns
6 ns
7 ns
6 ns
6 ns
6 ns
7 ns
• Fully Synchronous Dynamic RAM, with all signals referenced to a positive clock edge
• Pulsed interface
• Possible to assert random column address in every cycle
• Quad internal banks controlled by BA0, BA1 (Bank Select)
• Programmable burst-length (1, 2, 4, 8 and Full Page)
• Programmable wrap sequence (Sequential / Interleave)
• Programmable /CAS latency (2, 3)
• Automatic precharge and controlled precharge
• CBR (Auto) refresh and self refresh
• Single 3.3 V ±0.3 V power supply
• LVTTL compatible
• 4,096 refresh cycles/64 ms
• Burst termination by Burst Stop command and Precharge command
• 144-pin small outline dual in-line memory module (Pin pitch = 0.8 mm)
• Unbuffered type
• Serial PD
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No. M14014EJ5V0DS00 (5th edition)
Date Published February 2000 NS CP(K)
Printed in Japan
The mark • shows major revised points.
©
1999
MC-4516CD641ES, 4516CD641PS
DC Characteristics (Recommended Operating Conditions unless otherwise noted)
Parameter
Operating current
Symbol
Test condition
MIN. MAX. Unit Notes
ICC1 Burst length = 1, tRC ≥ tRC(MIN.)
/CAS latency = 2 -A80
560 mA 1
-A10
560
/CAS latency = 3 -A80
560
-A10
Precharge standby current in ICC2P CKE ≤ VIL(MAX.), tCK = 15 ns
5 power down mode
ICC2PS CKE ≤ VIL(MAX.), tCK = ∞
Precharge standby current in ICC2N CKE ≥ VIH(MIN.), tCK = 15 ns, /CS ≥ VIH(MIN.),
non power down mode
Input signals are changed one time during 30 ns.
ICC2NS CKE ≥ VIH(MIN.), tCK = ∞, Input signals are stable.
Active standby current in
ICC3P CKE ≤ VIL(MAX.), tCK = 15 ns
power down mode
ICC3PS CKE ≤ VIL(MAX.), tCK = ∞
Active standby current in
non power down mode
ICC3N CKE ≥ VIH(MIN.), tCK = 15 ns, /CS ≥ VIH(MIN.),
Input signals are changed one time during 30 ns.
ICC3NS CKE ≥ VIH(MIN.), tCK = ∞, Input signals are stable.
Operating current
ICC4 tCK ≥ tCK(MIN.), IO = 0 mA
/CAS latency = 2 -A80
(Burst mode)
-A10
560
8 mA
8
160 mA
64
40 mA
32
240 mA
160
700 mA
560
2
/CAS latency = 3 -A80
820
5 CBR (Auto) refresh current
ICC5
tRC ≥ tRC(MIN.)
-A10
/CAS latency = 2 -A80
-A10
680
1,040 mA
1,040
3
/CAS latency = 3 -A80
1,040
5 Self refresh current
ICC6 CKE ≤ 0.2 V
-A10
1,040
16 mA
Input leakage current
II(L) VI = 0 to 3.6 V, All other pins not under test = 0 V
– 8 +8 µA
Output leakage current
IO(L) DOUT is disabled, VO = 0 to 3.6 V
–3 +3 µA
High level output voltage
VOH IO = – 4.0 mA
2.4 V
Low level output voltage
VOL IO = + 4.0 mA
0.4 V
Notes 1. ICC1 depends on output loading and cycle rates. Specified values are obtained with the output open. In
addition to this, ICC1 is measured on condition that addresses are changed only one time during tCK(MIN.).
2. ICC4 depends on output loading and cycle rates. Specified values are obtained with the output open. In
addition to this, ICC4 is measured on condition that addresses are changed only one time during tCK(MIN.).
3. ICC5 is measured on condition that addresses are changed only one time during tCK(MIN.).
6 Data Sheet M14014EJ5V0DS00
6 Page MC-4516CD641ES, 4516CD641PS
5 Package Drawings
[MC-4516CD641ES]
144-PIN DUAL IN-LINE MODULE (SOCKET TYPE)
M1 (AREA B)
R
Y
A (AREA B)
Z
Q
L
N
M
M2 (AREA A)
I
F
HA
C
B
S
(OPTIONAL HOLES)
D
A1 (AREA A)
E
detail of A part
W D2
D1 X
V
U1 U2
T
ITEM
A
A1
B
C
D
D1
D2
E
F
H
I
L
M
M1
M2
N
Q
R
S
T
U1
U2
V
W
X
Y
Z
MILLIMETERS
67.6
67.6±0.15
23.2
29.0
4.6
1.5±0.10
4.0
32.8
3.7
0.8 (T.P.)
3.3
20.0
31.75±0.15
9.75
22.0
3.8 MAX.
R2.0
4.00±0.10
φ 1.8
1.0±0.1
3.2 MIN.
4.0 MIN.
0.25 MAX.
0.6±0.05
2.55 MIN.
2.0 MIN.
2.0 MIN.
M144S-80A14
12 Data Sheet M14014EJ5V0DS00
12 Page | ||
Seiten | Gesamt 16 Seiten | |
PDF Download | [ MC-4516CD641ES-A80 Schematic.PDF ] |
Teilenummer | Beschreibung | Hersteller |
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