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PDF LR38581 Data sheet ( Hoja de datos )

Número de pieza LR38581
Descripción Timing Generator IC for 270 k/320 k-pixel Color CCDs with Dual-power-supply Operation
Fabricantes Sharp 
Logotipo Sharp Logotipo



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No Preview Available ! LR38581 Hoja de datos, Descripción, Manual

LR38581
LR38581
Timing Generator IC for 270 k/320 k-pixel
Color CCDs with Dual-power-supply Operation
DESCRIPTION
The LR38581 is a CMOS timing generator IC which
generates timing pulses for driving 270 k/320 k-
pixel color CCD area sensors with a dual-power-
supply operation and processing pulses for color
video signals.
FEATURES
• Designed for 270 k/320 k-pixel color CCD area
sensors with a dual-power-supply-operation
• Switchable between NTSC and PAL modes
• Switchable between normal and mirror images
• Level shifter for readout and shutter pulses included
• +3.3 V, +5 V and +12.5 V power supplies
• Package :
48-pin QFP (QFP048-P-0707) 0.5 mm pin-pitch
PIN CONNECTIONS
48-PIN QFP
TOP VIEW
48 47 46 45 44 43 42 41 40 39 38 37
OBCP 1
CLP 2
PBLK 3
FS 4
FCDS 5
RS 6
GND 7
VDD3 8
ED0 9
ED1 10
ED2 11
MIR 12
36 SAD2
35 SAD1
34 HP
33 VD
32 ADCK
31 GND
30 VDD3
29 CDCK
28 SGCK
27 GND
26 CKO
25 CKI
13 14 15 16 17 18 19 20 21 22 23 24
(QFP048-P-0707)
In the absence of confirmation by device specification sheets, SHARP takes no responsibility for any defects that may occur in equipment using any SHARP devices shown in
catalogs, data books, etc. Contact SHARP in order to obtain the latest device specification sheets before using any SHARP device.
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LR38581 pdf
LR38581
PIN NO. SYMBOL
33 VD
I/O POLARITY
PIN NAME
Vertical reference
IC3
pulse input
DESCRIPTION
An input pin for reference of vertical pulse.
Connect to VD pin of DSP IC.
34 HP
IC3
Horizontal reference An input pin for reference of horizontal pulse.
pulse input
Connect to HD pin of DSP IC.
35 SAD1
36 SAD2
ICU3
ICU3
ADCK phase control An input pin to select the phase of ADCK.
input 1
SAD1 L H or open L H or open
ADCK phase control
input 2
SAD2 L
L H or open H or open
Phase 0˚ 60˚ delay 180˚ delay 240˚ delay
37 TST3
ICD5 – Test pin 3
A test pin. Set open or to L level in the normal mode.
38 TST4
39 PLCH
ICD5
ICU5
– Test pin 4
Polarity selection
input
A test pin. Set open or to L level in the normal mode.
An input pin to select the polarity of OBCP (pin 1),
CLP (pin 2), FS (pin 4), FCDS (pin 5) and RS (pin 6).
40 TVMD
ICU5
An input pin to select TV standards.
TV mode selection
L level
: NTSC mode
input
H level or open : PAL mode
A pulse to reset the charge of output circuit.
41 FR
O4MA53
Reset pulse output Connect to ØR pin of CCD through the DC offset circuit.
The output phase of FR is selected by serial data.
42 FH1B O4MA52
Horizontal transfer
pulse output 1B
A pulse to drive horizontal CCD shift register.
Connect to ØH1B pin of CCD.
43 GND
– – Ground
A grounding pin.
44 VDD5
– – Power supply
Supply of +5 V power.
45 FH1
O4MA53
Horizontal transfer
pulse output 1
A pulse to drive horizontal CCD shift register.
Connect to ØH1 pin of CCD.
46 FH2
O4MA53
Horizontal transfer
pulse output 2
A pulse to drive horizontal CCD shift register.
Connect to ØH2 pin of CCD.
47 FH2B O4MA52
Horizontal transfer
pulse output 2B
A pulse to drive horizontal CCD shift register.
Connect to ØH2B pin of CCD.
48 GND
– – Ground
A grounding pin.
IC3
ICU3
ICSU3
ICU5
ICD5
O4MA3
: Input pin (CMOS level)
: Input pin (CMOS level with pull-up resistor)
: Input pin (CMOS schmitt-trigger level with pull-up
resistor)
: Input pin (CMOS level with pull-up resistor)
: Input pin (CMOS level with pull-up resistor)
: Output pin (VDD = 3.3 V)
O4MA32 : Output pin (VDD = 3.3 V)
O4MA52 : Output pin (VDD = 5 V)
O4MA53 : Output pin (VDD = 5 V)
O12MHV : Output pin (VDD = 12.5 V)
OSCI3 : Input pin for oscillation
OSCO3 : Output pin for oscillation
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