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PDF 74LV4799 Data sheet ( Hoja de datos )
| Número de pieza | 74LV4799 | |
| Descripción | Timer for NiCd and NiMH chargers | |
| Fabricantes | Philips | |
| Logotipo |  |
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INTEGRATED CIRCUITS
74LV4799
Timer for NiCd and NiMH chargers
Product specification
Supersedes data of 1998 Apr 07
IC24 Data Handbook
1998 Apr 20
Philips
Semiconductors
1 page  
Philips Semiconductors
Timer for NiCd and NiMH chargers
Product specification
74LV4799
Self-discharge mode.
If DIS is HIGH and PWRS is inactive (LOW or open), the battery is
being neither charged nor discharged. The circuit is in the
self-discharge mode. This mode represents the battery leakage
(self-discharge). The counter counts down. The clock frequency is
determined by the external capacitor and resistor at the RS output.
When the counter reaches the zero state, it stops.
LED mode select.
The LED output drives a battery status LED which indicates the
charge/full status of the battery. For optimum flexibility, two modes of
operation are built-in.
• Mode 1: If SEL is LOW, the LED output is active LOW in the
charge mode, and the LED blinks with a frequency of
about 1 Hz during trickle charge.
• Mode 2: If SEL is HIGH or open, the LED output blinks with a
frequency of about 0.25 Hz in the charge mode, and is
active LOW during trickle charge. In the discharge or
self-discharge mode, the LED output is open except
when PWRS is active (HIGH or pulsed). Then, the
battery is charging and discharging simultaneously.
Although the discharge mode is dominant, the LED
output is active when PWRS is also active.
NOTE: The blink frequency depends on the oscillator frequency.
(See application information)
Low indication.
As part of the user interface, the MOLLI output shows when the
battery needs to be charged. MOLLI stands for More Or Less Low
Indication (active LOW). The function is as follows: In the discharge
mode, (DIS is active LOW), the counter counts down and, when it
reaches the zero state, it stops. If DIS is switched HIGH, the MOLLI
output gives an output signal of four periods of about one second,
with a 50% duty cycle. This can be used to activate a buzzer. The
MOLLI output signal of four periods will be interrupted as soon as
PWRS is activated.
Alarm indication.
If an almost completely discharged battery is connected to the
charger, it may not be noticed by the user if the load switch is still
on. To prevent damaging the battery, an alarm signal on the LED
output will alert the user to switch off the load. The alarm signal is
easily recognized, because the LED output will blink at a higher
frequency than normal (about 5 Hz instead of 1 Hz). This alarm
indication is only active if the SEL input is HIGH or open. If the SEL
input is LOW, no alarm indication is present, because in many
applications simultaneous charging and discharging is quite
acceptable. (See charge/discharge mode)
Scan test mode.
If the SCAN input (pin 14) is made active HIGH, the circuit is in the
test mode. The tester clock is connected to the IOSC pin (pin 13). In
the scan mode, the on–chip oscillator is bypassed to allow rapid
testing of the divider/counter. The scan test patterns are available on
request. The scan test data is entered serially through the SCI input
(pin 15). The scan out data is present on the MOLLI/SCO output
(pin 6), which then acts as a scan output.
Remaining energy indication.
The scan test facility can be used as a remaining energy indication
because the value of the counter can be read out at the scan output
(MOLLI/SCO). This is done by briefly interrupting the normal mode
of operation, putting the circuit in the scan mode, and reading out
the counter value. The circuit then reverts to the normal mode. This
only works correctly with the MOLLI/SCO output and SCI input
linked (round coupled loop) and with exactly 49 clock pulses applied
to the IOSC input.
The serial scan-out data is available on the MOLLI/SCO output. The
value of the counter can be decoded by reading the correct bits.
Details are given later in the section “Application information”.
Output drivers EN and EN.
In one-cell battery (low-voltage) applications, the drive from the
ENABLE output (EN) is insufficient to provide the base current directly
for the external bipolar PNP regulator transistor. The inverse signal has
therefore been made available at the ENABLE output (EN) to drive an
extra bipolar NPN transistor that can provide the base current for the
bipolar PNP regulator transistor as shown in Figure 2.
FUNCTION TABLE 1
OPERATING
MODES
Charge
INPUTS
PWRS
VIN DIS EN
H or H H H
Trickle charge
H or H H
Charge/discharge
H or
HLH
Discharge
L or open X L L
Self-discharge
L or open X H L
OUTPUTS
EN RC RD
LZ
Z
LZ
ZZ
ZZZ
DIVIDER/COUNTER
RS MODE
Z Count up 22 sections
VALUE
< max
Stop
max
Z Count down 18 sections
≥ min
Z Count down 18 sections
≥ min
Count down 27 sections
≥ min
1998 Apr 20
5
5 Page 
Philips Semiconductors
Timer for NiCd and NiMH chargers
Product specification
74LV4799
Error free operation, even under extreme conditions.
Several measures are taken in the circuit design to ensure
error–free operation, even with very low supply voltages. Moreover,
the circuit has been made very insensitive to the effects of external
fields. The measures taken during the design are:
• Use of synchronous logic
• Bistable POR instead of monostable POR
• Data retention assured below a supply voltage of 0.9 V.
• Debounce circuitry on DIS input (maximum expected debounce
time = 10 ms)
• Schmitt trigger on PWRS (power sense) input and on DIS input
• Special oscillator security to prevent any malfunction.
Synchronous logic and bistable POR.
Use of synchronous logic results in much lower sensitivity to spikes
on input pins. The POR is adapted to fit well into a synchronous
environment. An increasing supply voltage sets the POR. The POR
output signal is routed to the control logic and divider/counter. it is
synchronized with the on–chip clock. After all flip–flops are reset, a
reset acknowledge signal is generated which resets the POR. This
method ensures that the POR signal is acknowledged in all cases,
even at very low voltages.
Data retention.
The circuit may be used in an application where an electric motor is
present. When the motor is switched on, it will disturb the supply
voltage for a short period. The POR level is set at such a level that,
even with very low supply voltages, the POR will not respond during
motor switch on. The flip–flops will retain their data during the supply
voltage disturbance because of the inherent data retention of any
CMOS gate. However, when the battery is almost completely
discharged and the motor switch is activated, the dip on the supply
voltage line can be too large. The retention of the POR is therefore
made deliberately worse than that of the internal flip–fops. The POR
will therefore respond long before the flip–flops will loose their data.
This results in a proper start condition for a new charge cycle.
Debounce circuitry on DIS input.
A discharge cycle is activated by a switch. To protect the circuit from
any bounce of the switch contacts, de–bounce circuitry is provided
at the DIS input. The circuitry allows a switch de–bounce time of
max. 10 ms.
Schmitt trigger on PWRS (power sense) input.
The PWRS input can be corrupted by high transients due to
disturbances on the mains supply. To suppress any false triggering,
the PWRS input is provided with a Schmitt–trigger. However, for
some applications, it is advisable to connect a low–value capacitor
(150 pF min.) between the PWRS input and GND.
Special oscillator security to prevent any malfunction.
The excellent performance of the oscillator is achieved by using
linear op–amp techniques. The oscillator consists of an internal
reference, two comparators and a latch. Care was taken to design a
very reliable oscillator even with a supply voltage below 0.9 V. If one
of the comparators ceases to operate with a supply voltage below
0.9 V, the latch will not be corrupted. Priority was given to stop the
oscillator rather than allow uncontrolled oscillation.
All these measures result in reliable 1-cell to 4-cell battery charge
management.
Remaining energy indication:
The scan test facility can be used as a remaining energy indication
because the value of the counter can be read–out at the scan output
(MOLLI/SCO). This is achieved by briefly interrupting the normal
mode of operation, putting the circuit in the scan mode
(pin 14 = HIGH), and reading–out of the counter value. The circuit is
then returned to the normal mode (pin 14 = LOW or open).
Read–out procedure: The contents of the counter flip–flops can be
read–out in the scan mode. To ensure that there is no disturbance of
the circuit function, it is essential to either create a round coupled loop
by linking the MOLLI/SCO output (pin 6) directly to the SCI input
pin 15), or to shift–in the serial data of the scan line at the SCI input
after completion of the read out cycle. 49 clock pulses are needed on
the Iosc input (pin 13) to shift–out the contents of the whole scan line.
The most–significant bit of the counter will appear at the MOLLI/SCO
output after the last clock pulse. The least–significant bit after the
penultimate clock pulse, etc. Selecting the last three or four bits will
yield sufficiently high accuracy to obtain the counter value which
represents the remaining energy of the battery.
BYD13D
220 V
AC
mains
110 V
BYD13D
1998 Apr 20
BYD13D
BZD23
BZD23
BC557
BC327/
BC636
n.c.
4
V in
1
LED
3
EN
EN
BC547
2
5
7 PWRS
74LV4799
V CC
SEL
14
MOLLI
SCAN
15
SCI DIS
R C R D R S IOSC
16
6
9
10 11 12 13 8
BYD13D
Figure 2. Typical application of the low-voltage 74LV4799.
11
RZ
BC557
LOAD
battery
buzzer
SV01647
11 Page | ||
| Páginas | Total 18 Páginas | |
| PDF Descargar | [ Datasheet 74LV4799.PDF ] | |
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