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PDF 74LS670 Data sheet ( Hoja de datos )

Número de pieza 74LS670
Descripción LOW POWER SCHOTTKY
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1. 74LS670






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No Preview Available ! 74LS670 Hoja de datos, Descripción, Manual

SN74LS670
4 x 4 Register File
with 3-State Outputs
The TTL / MSI SN74LS670 is a high-speed, low-power 4 x 4
Register File organized as four words by four bits. Separate read and
write inputs, both address and enable, allow simultaneous read and
write operation.
The 3-state outputs make it possible to connect up to 128 outputs to
increase the word capacity up to 512 words. Any number of these
devices can be operated in parallel to generate an n-bit length.
Simultaneous Read / Write Operation
Expandable to 512 Words by n-Bits
Typical Access Time to 20 ns
3-State Outputs for Expansion
Typical Power Dissipation of 125 mW
GUARANTEED OPERATING RANGES
Symbol
Parameter
Min Typ Max Unit
VCC Supply Voltage
TA Operating Ambient
Temperature Range
4.75 5.0 5.25
V
0 25 70 °C
IOH Output Current – High
IOL Output Current – Low
– 2.6
24
mA
mA
http://onsemi.com
LOW
POWER
SCHOTTKY
16
1
PLASTIC
N SUFFIX
CASE 648
16
1
SOIC
D SUFFIX
CASE 751B
ORDERING INFORMATION
Device
Package
Shipping
SN74LS670N 16 Pin DIP 2000 Units/Box
SN74LS670D
16 Pin
2500/Tape & Reel
© Semiconductor Components Industries, LLC, 1999
December, 1999 – Rev. 6
1
Publication Order Number:
SN74LS670/D

1 page




74LS670 pdf
AC CHARACTERISTICS (TA = 25°C)
Symbol
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPZH
tPZL
tPLZ
tPHZ
Parameter
Propagation Delay, RA or RB
to Output
Propagation Delay, EW to
Output
Propagation Delay, Data
to Output
Output Enable Time
Output Disable Time
AC SETUP REQUIREMENTS (TA = 25°C)
Symbol
tW
ts
ts
th
th
trec
Parameter
Pulse Width
Setup Time, (D)
Setup Time, (W)
Hold Time, (D)
Hold Time, (W)
Recovery Time
SN74LS670
Limits
Min Typ Max
23 40
25 45
26 45
28 50
25 45
23 40
15 35
22 40
16 35
30 50
Unit
ns
ns
ns
ns
ns
Limits
Min Typ Max
25
10
15
15
5.0
25
Unit
ns
ns
ns
ns
ns
ns
AC WAVEFORMS
Test Conditions
VCC = 5.0 V,
CL = 45 pF
CL = 5.0 pF
Test Conditions
VCC = 5.0 V
D, EW
Q
1.3 V
tPHL
1.3 V
1.3 V
tPLH
1.3 V
Figure 1.
RA, RB
Q
1.3 V
tPHL
1.3 V
1.3 V
tPLH
1.3 V
Figure 2.
WA, WB
D
EW
1.3 V
ts
1.3 V
tW
1.3 V
th
1.3 V 1.3 V
ts th
1.3 V
Figure 3.
http://onsemi.com
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