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ZNBG3010 Schematic ( PDF Datasheet ) - Zetex Semiconductors

Teilenummer ZNBG3010
Beschreibung FET BIAS CONTROLLER AND POLARITY SWITCH
Hersteller Zetex Semiconductors
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Gesamt 10 Seiten
ZNBG3010 Datasheet, Funktion
FET BIAS CONTROLLER AND
POLARITY SWITCH
ISSUE 1 - FEBRUARY 1998
DEVICE DESCRIPTION
The ZNBG series of devices are designed to
meet the bias requirements of GaAs and
HEMT FETs commonly used in satellite
receiver LNBs, PMR cellular telephones etc.
with a minimum of external components.
With the addition of two capacitors and a
resistor, the devices provide drain voltage
and current control for three external
grounded source FETs, generating the
regulated negative rail required for FET gate
biasing whilst operating from a single supply.
This negative bias, at -3 volts, can also be
used to supply other external circuits.
The ZNBG3010/11 includes bias circuits to
drive up to three external FETs. A control
input to the device selects either one of two
FETs as operational, the third FET is
permanently active. This feature is
particularly used as an LNB polarisation
switch.
Drain current setting of the ZNBG3010/11 is
user selectable over the range 0 to 15mA,
this is achieved with addition of a single
resistor. The series also offers the choice of
drain voltage to be set for the FETs, the
ZNBG3010 gives 2.2 volts drain whilst the
ZNBG3011 gives 2 volts.
FEATURES
Provides bias for GaAs and HEMT FETs
Drives up to three FETs
Dynamic FET protection
Drain current set by external resistor
Regulated negative rail generator
requires only 2 external capacitors
Choice in drain voltage
Wide supply voltage range
Polarisation switch for LNBs
QSOP surface mount package
ZNBG3010
ZNBG3011
These devices are unconditionally stable
over the full working temperature with the
FETs in place, subject to the inclusion of the
recommended gate and drain capacitors.
These ensure RF stability and minimal
injected noise.
It is possible to use less than the devices full
complement of FET bias controls, unused
drain and gate connections can be left open
circuit without affecting operation of the
remaining bias circuits.
In order to protect the external FETs the
circuits have been designed to ensure that,
under any conditions including power
up/down transients, the gate drive from the
bias circuits cannot exceed the range -3.5V
to 1V. Furthermore if the negative rail
experiences a fault condition, such as
overload or short circuit, the drain supply to
the FETs will shut down avoiding excessive
current flow.
The ZNBG3010/11 are available in QSOP16
for the minimum in device size. Device
operating temperature is -40 to 70°C to suit
a wide range of environmental conditions.
APPLICATIONS
Satellite receiver LNBs
Private mobile radio (PMR)
Cellular telephones
4-114






ZNBG3010 Datasheet, Funktion
APPLICATIONS CIRCUIT
ZNBG3010
ZNBG3011
APPLICATIONS INFORMATION
The above is a partial application circuit for the ZNBG series showing all external components
required for appropriate biasing. The bias circuits are unconditionally stable over the full
temperature range with the associated FETs and gate and drain capacitors in circuit.
Capacitors CD and CG ensure that residual power supply and substrate generator noise is not
allowed to affect other external circuits which may be sensitive to RF interference. They also
serve to suppress any potential RF feedthrough between stages via the ZNBG device. These
capacitors are required for all stages used. Values of 10nF and 4.7nF respectively are
recommended however this is design dependent and any value between 1nF and 100nF could
be used.
The capacitors CNB and CSUB are an integral part of the ZNBGs negative supply generator. The
negative bias voltage is generated on-chip using an internal oscillator. The required value of
capacitors CNB and CSUB is 47nF. This generator produces a low current supply of approximately
-3 volts. Although this generator is intended purely to bias the external FETs, it can be used to
power other external circuits via the CSUB pin.
Resistor RCAL sets the drain current at which all external FETs are operated. If any bias control
circuit is not required, its related drain and gate connections may be left open circuit without
affecting the operation of the remaining bias circuits.
The ZNBG devices have been designed to protect the external FETs from adverse operating
conditions. With a JFET connected to any bias circuit, the gate output voltage of the bias circuit
can not exceed the range -3.5V to 1V, under any conditions including powerup and powerdown
transients. Should the negative bias generator be shorted or overloaded so that the drain current
of the external FETs can no longer be controlled, the drain supply to FETs is shut down to avoid
damage to the FETs by excessive drain current.
4-120

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