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WM0831 Schematic ( PDF Datasheet ) - Wolfson Microelectronics plc

Teilenummer WM0831
Beschreibung 8-Bit ADCs with Serial Interface and Differential or Dual Inputs
Hersteller Wolfson Microelectronics plc
Logo Wolfson Microelectronics plc Logo 




Gesamt 14 Seiten
WM0831 Datasheet, Funktion
WM0831, WM0832
Production Data
Sept 1996 Rev 2.1
8-Bit ADCs with Serial Interface and
Differential or Dual Inputs
Description
WM0831 and WM0832 are 8-bit analogue to digital
converters (ADC) with serial I/O interfaces, providing a
choice of input configurations in 8-pin SO or DIP packages.
WM0831 has a differential input, also configurable as a
single ended input. A-D conversion results are serially
output on Data Out (DO) under the control of clock and chip
select inputs. The device has a separate voltage reference
input.
WM0832's two input multiplexer is configurable via the Data
In (DI) serial input, as two single ended inputs or a single
differential input. The voltage reference operates
ratiometrically and is internally connected to the VCC pin.
Conversion is initiated by bringing and holding chip select
low while providing a clock input. With WM0831's fixed
input configuration, the conversion result is output at DO on
the clock's falling edges in MSB to LSB order.
With WM0832's configurable input multiplexer, data is input
to DI on the rising edges of the clock to setup the Mux and
initiate conversion. Conversion results appear serially at
DO on the falling edges of the clock, first in MSB to LSB
order, and then repeated in LSB to MSB order.
WM0831/2 operate on 5V or 3.3V supply voltages and are
available in small outline and DIP packages for commercial
(0 to 70oC) and industrial (-40 to 85oC) temperature ranges.
Features
• Functionally Equivalent to National Semiconduc-
tor ADC0831 and ADC0832
• WM0831: Differential or single ended input
• WM0832: Two single ended inputs or a single
differential input
• Ratiometric reference input (fixed for WM0832)
• Serial I/O interface
• Input range 0 to Vcc with Vcc Reference
• 8 pin package, SO or DIP
• 5V and 3.3V variants
• Total Unadjusted Error: ± 1 LSB
• 8-bit resolution
• 32 µs conversion time at fclock = 250 kHz
Applications
• Embedding with remote sensors
• Equipment health monitoring
• Automotive
• Industrial control
Block Diagrams
WM0831
VREF
IN+
IN-
Comparator
DAC
&
SAR
Logic
GND
WM0831
Output
Latch
Vcc
CS
CLK
DO
CS
CLK
DI
CH0
CH1
GND
WM0832
Input Latch
Mux Select Start Conv
Internal CS
VREF
Input
MUX
Comparator
DAC
&
SAR
Logic
WM0832
Output Shift
Register
Vcc
DO
Production Data data sheets contain final
specifications current on publication date. Supply
of products conforms to Wolfson Microelectronics
standard terms and conditions.
Wolfson Microelectronics
Lutton Court, Bernard Terrace, Edinburgh EH8 9NX, UK
Tel: +44 (0) 131 667 9386 Fax: +44 (0) 131 667 5176
www: http://www.wolfson.co.uk
© 1996 Wolfson Microelectronics






WM0831 Datasheet, Funktion
WM0831, WM0832
Electrical Characteristics (continued)
Notes:
1. Absolute Maximum Ratings are stress ratings only.
Permanent damage to the device may be caused by
continuously operating at or beyond these limits. De-
vice functional operating range limits are given under
Recommended Operating Conditions. Guaran-
teed performance specifications are given under Elec-
trical Characteristics at the test conditions specified.
2. All voltage values, except differential voltages are with
respect to the ground.
3. When the input voltage VIN at any pin exceeds the
power supply rails (GND > VIN > VCC) the absolute value
of current at that pin should be limited to 5 mA or less.
The 20 mA package input current limits the number of
pins that can exceed the power supply boundaries
with a 5 mA supply current to four.
4. A clock duty cycle range of 40% to 60% ensures
correct operation at all clock frequencies. For a clock
with a duty cycle outside these limits, the minimum time
the clock is high or low must be at least 666 ns, with
the maximum time for clock high or low being 60 ms.
5. All typical values are at VCC = 5 V, TA = 25oC for 5V
devices and VCC = 3.3V, TA = 25oC.
6. All parameters are measured under open-loop
conditions with zero common mode input voltage
(unless otherwise stated).
7. Total Unadjusted Error (TUE) is the sum of integral
linearity error, zero code error and full scale error over
the output code range.
8. A Differential linearity of "n" bits ensures a code width
exists to "n" bits. Hence a Differential Linearity of 8
bits for an 8 bit ADC guarantees no missing codes.
9. For VIN(-) greater than or equal to VIN(+) the digital out-
put code will be 00 Hex. Connected to each analogue
input are two diodes which will forward conduct for a
diode drop outside the supply rails, VCC and GND. If an
analogue input voltage does not exceed the supply volt-
age by more than 50 mV, the output code will be cor-
rect. To use an absolute input voltage range of 0 to V
CC
a minimum VCC - 0.05 V is required for all variations of
temperature. Care should be exercised when testing at
low VCC levels with a maximum analogue voltage as
this can cause the input diode to conduct, especially at
high temperature, and cause errors for analogue inputs
near full scale.
10. Standby input leakage currents, are currents going in
or out of the on or off channels when the ADC is not
performing conversion and the clock input is in a high
or low steady-state condition.
11. For WM0832 the reference current is included in the
supply current as V is internally connected to V .
REF
CC
Wolfson Microelectronics
6

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WM0831 pdf, datenblatt
WM0831, WM0832
Functional Description (continued)
Analogue Inputs.
While sampling the analogue inputs short spikes of
current enter a “+” input and flow out of the corresponding
“-” input at the clock edges during conversion. This
current does not cause errors as it decays rapidly and the
internal comparator is strobed at the end of a clock
period. Care should be exercised if bypass capacitors are
used at the inputs, as an apparent offset error can be
caused by the capacitor averaging the input current and
developing a voltage across the source resistance.
Bypass capacitors should not be used with a source
resistance greater than 1kΩ.
In considering error sources, input leakage current will also
cause a voltage drop across the source resistance and
hence high impedance sources should be buffered.
In differential mode there is a 1/2 clock period interval be-
tween sampling the “+” and the “-” inputs. If there is a change
in common mode voltage during this interval an error could
notionally result.
For a sinusoidal common mode signal the error is given
by: VERROR = VPEAK (2πfCM) (1/(2fCLK))
Where
VPEAK = Peak common mode voltage
fCM = Common mode signal frequency
fCLK = Clock frequency.
Wolfson Microelectronics
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