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W24258-70LL Schematic ( PDF Datasheet ) - Winbond

Teilenummer W24258-70LL
Beschreibung 32K X 8 CMOS STATIC RAM
Hersteller Winbond
Logo Winbond Logo 




Gesamt 10 Seiten
W24258-70LL Datasheet, Funktion
W24258/LL
GENERAL DESCRIPTION
32K × 8 CMOS STATIC RAM
The W24258/LL is a normal speed, very low power CMOS static RAM organized as 32768 × 8 bits
that operates on a single 5-volt power supply. This device is manufactured using Winbond's high
performance CMOS technology.
FEATURES
Low power consumption:
Active: 350 mW (max.)
Standby: 25 µW (max.)
Access time: 55/70 nS (max.)
Single 5V power supply
Fully static operation
All inputs and outputs directly TTL compatible
Three-state outputs
Battery back-up operation capability
Data retention voltage: 2V (min.)
Packaged in 28-pin 600 mil DIP, 330 mil SOP
and standard type one TSOP (8 mm × 13.4
mm)
PIN CONFIGURATIONS
BLOCK DIAGRAM
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O1
I/O2
I/O3
VSS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28-pin
DIP
28
27
26
25
24
23
22
21
20
19
18
17
16
15
VDD
WE
A13
A8
A9
A11
OE
A10
CS
I/O8
I/O7
I/O6
I/O5
I/O4
CLK GEN.
PRECHARGE CKT.
A12
A14
R
A2 O
W
A3 CORE CELL ARRAY
D
A4 E 512 ROWS
C
A5 O 64 X 8 COLUMNS
D
A6 E
R
A7
A13
I/O1 DATA
I/O CKT.
I/O8 CNTRL. COLUMN DECODER
CLK
GEN.
A11 A10 A1 A0 A8 A9
WE
CS
OE
OE
A11
A9
A8
A13
WE
V DD
A14
A12
A7
A6
A5
A4
A3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28-pin
TSOP
28 A10
27 CS
26 I/O8
25 I/O7
24 I/O6
23 I/O5
22 I/O4
21 V SS
20 I/O3
19 I/O2
18 I/O1
17 A0
16 A1
15 A2
PIN DESCRIPTION
SYMBOL
A0A14
I/O1I/O8
CS
WE
OE
VDD
VSS
DESCRIPTION
Address Inputs
Data Inputs/Outputs
Chip Select Input
Write Enable Input
Output Enable Input
Power Supply
Ground
Publication Release Date: November 1998
- 1 - Revision A5






W24258-70LL Datasheet, Funktion
Timing Waveforms, continued
Write Cycle 1
Address
OE
CS
WE
D OUT
D IN
W24258/LL
TWC
T WR
TCW
TAS
TOHZ
T AW
(1, 4)
T WP
TDW
TDH
Write Cycle 2
(OE = VIL Fixed)
Address
CS
WE
D OUT
DIN
T WC
TCW
TWR
TAW
TAS
TWP
TOH
TWHZ
(1, 4)
TOW
(2) (3)
TDW
TDH
Notes:
1. During this period, I/O pins are in the output state, so input signals of opposite phase to the outputs should not be applied.
2. The data output from DOUT are the same as the data written to DIN during the write cycle.
3. DOUT provides the read data for the next address.
4. Transition is measured ±500 mV from steady state with CL = 5 pF. This parameter is guaranteed but not 100% tested.
-6-

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